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gen_amd64_new_nodes.c
1 #include "gen_amd64_new_nodes.h"
2 
3 #include "benode.h"
4 #include "amd64_bearch_t.h"
5 #include "gen_amd64_regalloc_if.h"
6 #include "amd64_new_nodes_t.h"
7 #include "fourcc.h"
8 #include "irgopt.h"
9 #include "ircons_t.h"
10 
11 ir_op *op_amd64_add = NULL;
12 ir_op *op_amd64_adds = NULL;
13 ir_op *op_amd64_and = NULL;
14 ir_op *op_amd64_bsf = NULL;
15 ir_op *op_amd64_bsr = NULL;
16 ir_op *op_amd64_call = NULL;
17 ir_op *op_amd64_cltd = NULL;
18 ir_op *op_amd64_cmp = NULL;
19 ir_op *op_amd64_cmpxchg = NULL;
20 ir_op *op_amd64_copyB = NULL;
21 ir_op *op_amd64_copyB_i = NULL;
22 ir_op *op_amd64_cqto = NULL;
23 ir_op *op_amd64_cvtsd2ss = NULL;
24 ir_op *op_amd64_cvtsi2sd = NULL;
25 ir_op *op_amd64_cvtsi2ss = NULL;
26 ir_op *op_amd64_cvtss2sd = NULL;
27 ir_op *op_amd64_cvttsd2si = NULL;
28 ir_op *op_amd64_cvttss2si = NULL;
29 ir_op *op_amd64_div = NULL;
30 ir_op *op_amd64_divs = NULL;
31 ir_op *op_amd64_fadd = NULL;
32 ir_op *op_amd64_fchs = NULL;
33 ir_op *op_amd64_fdiv = NULL;
34 ir_op *op_amd64_fdup = NULL;
35 ir_op *op_amd64_fild = NULL;
36 ir_op *op_amd64_fisttp = NULL;
37 ir_op *op_amd64_fld = NULL;
38 ir_op *op_amd64_fld1 = NULL;
39 ir_op *op_amd64_fldz = NULL;
40 ir_op *op_amd64_fmul = NULL;
41 ir_op *op_amd64_fpop = NULL;
42 ir_op *op_amd64_fst = NULL;
43 ir_op *op_amd64_fstp = NULL;
44 ir_op *op_amd64_fsub = NULL;
45 ir_op *op_amd64_fucomi = NULL;
46 ir_op *op_amd64_fxch = NULL;
47 ir_op *op_amd64_haddpd = NULL;
48 ir_op *op_amd64_idiv = NULL;
49 ir_op *op_amd64_ijmp = NULL;
50 ir_op *op_amd64_imul = NULL;
51 ir_op *op_amd64_imul_1op = NULL;
52 ir_op *op_amd64_jcc = NULL;
53 ir_op *op_amd64_jmp = NULL;
54 ir_op *op_amd64_jmp_switch = NULL;
55 ir_op *op_amd64_l_haddpd = NULL;
56 ir_op *op_amd64_l_punpckldq = NULL;
57 ir_op *op_amd64_l_subpd = NULL;
58 ir_op *op_amd64_lea = NULL;
59 ir_op *op_amd64_leave = NULL;
60 ir_op *op_amd64_mov_gp = NULL;
61 ir_op *op_amd64_mov_imm = NULL;
62 ir_op *op_amd64_mov_store = NULL;
63 ir_op *op_amd64_movd = NULL;
64 ir_op *op_amd64_movd_gp_xmm = NULL;
65 ir_op *op_amd64_movd_xmm_gp = NULL;
66 ir_op *op_amd64_movdqa = NULL;
67 ir_op *op_amd64_movdqu = NULL;
68 ir_op *op_amd64_movdqu_store = NULL;
69 ir_op *op_amd64_movs = NULL;
70 ir_op *op_amd64_movs_store_xmm = NULL;
71 ir_op *op_amd64_movs_xmm = NULL;
72 ir_op *op_amd64_mul = NULL;
73 ir_op *op_amd64_muls = NULL;
74 ir_op *op_amd64_neg = NULL;
75 ir_op *op_amd64_not = NULL;
76 ir_op *op_amd64_or = NULL;
77 ir_op *op_amd64_pop_am = NULL;
78 ir_op *op_amd64_punpckldq = NULL;
79 ir_op *op_amd64_push_am = NULL;
80 ir_op *op_amd64_push_reg = NULL;
81 ir_op *op_amd64_ret = NULL;
82 ir_op *op_amd64_sar = NULL;
83 ir_op *op_amd64_sbb = NULL;
84 ir_op *op_amd64_setcc = NULL;
85 ir_op *op_amd64_shl = NULL;
86 ir_op *op_amd64_shr = NULL;
87 ir_op *op_amd64_sub = NULL;
88 ir_op *op_amd64_sub_sp = NULL;
89 ir_op *op_amd64_subpd = NULL;
90 ir_op *op_amd64_subs = NULL;
91 ir_op *op_amd64_test = NULL;
92 ir_op *op_amd64_ucomis = NULL;
93 ir_op *op_amd64_xor = NULL;
94 ir_op *op_amd64_xor_0 = NULL;
95 ir_op *op_amd64_xorp = NULL;
96 ir_op *op_amd64_xorp_0 = NULL;
97 
98 
99 static int amd64_opcode_start = -1;
100 
102 #define amd64_op_tag FOURCC('a', 'm', 'd', '6')
103 
105 int is_amd64_op(const ir_op *op)
106 {
107  return get_op_tag(op) == amd64_op_tag;
108 }
109 
111 int is_amd64_irn(const ir_node *node)
112 {
113  return is_amd64_op(get_irn_op(node));
114 }
115 
116 int get_amd64_irn_opcode(const ir_node *node)
117 {
118  assert(is_amd64_irn(node));
119  return get_irn_opcode(node) - amd64_opcode_start;
120 }
121 
122 #undef BIT
123 #define BIT(x) (1 << (x))
124 
125 static const unsigned amd64_limit_gp_rbp[] = { BIT(REG_GP_RBP), 0 };
126 static const unsigned amd64_limit_gp_rsp[] = { BIT(REG_GP_RSP), 0 };
127 
128 static const arch_register_req_t amd64_requirements_gp_rbp_I = {
129  .cls = &amd64_reg_classes[CLASS_amd64_gp],
130  .limited = amd64_limit_gp_rbp,
131  .should_be_same = 0,
132  .must_be_different = 0,
133  .width = 1,
134  .ignore = true,
135 };
136 
137 static const arch_register_req_t amd64_requirements_gp_rsp_I = {
138  .cls = &amd64_reg_classes[CLASS_amd64_gp],
139  .limited = amd64_limit_gp_rsp,
140  .should_be_same = 0,
141  .must_be_different = 0,
142  .width = 1,
143  .ignore = true,
144 };
145 
146 static const arch_register_req_t amd64_requirements_gp_in_r0 = {
147  .cls = &amd64_reg_classes[CLASS_amd64_gp],
148  .limited = NULL,
149  .should_be_same = 1,
150  .must_be_different = 0,
151  .width = 1,
152 };
153 
154 
155 
156 ir_node *new_bd_amd64_add(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
157 {
158 
159 
160  ir_graph *const irg = get_irn_irg(block);
161  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_add, mode_T, arity, in);
162 
163  /* init node attributes */
164 
165  /* flags */
166  arch_irn_flags_t irn_flags = arch_irn_flags_none;
167  irn_flags |= arch_irn_flag_modify_flags;
168  irn_flags |= arch_irn_flag_rematerializable;
169  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
170  int const n_res = 3;
171  be_info_init_irn(res, irn_flags, in_reqs, n_res);
172  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
173  (void)attr; /* avoid potential warning */
174  *attr = *attr_init;
175  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
176  out_infos[0].req = &amd64_class_reg_req_gp;
177  out_infos[1].req = &amd64_class_reg_req_flags;
178  out_infos[2].req = &arch_memory_requirement;
179 
180  verify_new_node(res);
181  return optimize_node(res);
182 }
183 
184 ir_node *new_bd_amd64_adds(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
185 {
186 
187 
188  ir_graph *const irg = get_irn_irg(block);
189  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_adds, mode_T, arity, in);
190 
191  /* init node attributes */
192 
193  /* flags */
194  arch_irn_flags_t irn_flags = arch_irn_flags_none;
195  irn_flags |= arch_irn_flag_rematerializable;
196  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
197  int const n_res = 3;
198  be_info_init_irn(res, irn_flags, in_reqs, n_res);
199  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
200  (void)attr; /* avoid potential warning */
201  *attr = *attr_init;
202  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
203  out_infos[0].req = &amd64_class_reg_req_xmm;
204  out_infos[1].req = &arch_no_requirement;
205  out_infos[2].req = &arch_memory_requirement;
206 
207  verify_new_node(res);
208  return optimize_node(res);
209 }
210 
211 ir_node *new_bd_amd64_and(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
212 {
213 
214 
215  ir_graph *const irg = get_irn_irg(block);
216  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_and, mode_T, arity, in);
217 
218  /* init node attributes */
219 
220  /* flags */
221  arch_irn_flags_t irn_flags = arch_irn_flags_none;
222  irn_flags |= arch_irn_flag_modify_flags;
223  irn_flags |= arch_irn_flag_rematerializable;
224  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
225  int const n_res = 3;
226  be_info_init_irn(res, irn_flags, in_reqs, n_res);
227  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
228  (void)attr; /* avoid potential warning */
229  *attr = *attr_init;
230  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
231  out_infos[0].req = &amd64_class_reg_req_gp;
232  out_infos[1].req = &amd64_class_reg_req_flags;
233  out_infos[2].req = &arch_memory_requirement;
234 
235  verify_new_node(res);
236  return optimize_node(res);
237 }
238 
239 ir_node *new_bd_amd64_bsf(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
240 {
241 
242 
243  ir_graph *const irg = get_irn_irg(block);
244  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_bsf, mode_T, arity, in);
245 
246  /* init node attributes */
247 
248  /* flags */
249  arch_irn_flags_t irn_flags = arch_irn_flags_none;
250  irn_flags |= arch_irn_flag_modify_flags;
251  irn_flags |= arch_irn_flag_rematerializable;
252  int const n_res = 3;
253  be_info_init_irn(res, irn_flags, in_reqs, n_res);
254  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
255  (void)attr; /* avoid potential warning */
256  init_amd64_attributes(res, op_mode, size);
257  attr->addr = addr;
258  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
259  out_infos[0].req = &amd64_class_reg_req_gp;
260  out_infos[1].req = &amd64_class_reg_req_flags;
261  out_infos[2].req = &arch_memory_requirement;
262 
263  verify_new_node(res);
264  return optimize_node(res);
265 }
266 
267 ir_node *new_bd_amd64_bsr(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
268 {
269 
270 
271  ir_graph *const irg = get_irn_irg(block);
272  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_bsr, mode_T, arity, in);
273 
274  /* init node attributes */
275 
276  /* flags */
277  arch_irn_flags_t irn_flags = arch_irn_flags_none;
278  irn_flags |= arch_irn_flag_modify_flags;
279  irn_flags |= arch_irn_flag_rematerializable;
280  int const n_res = 3;
281  be_info_init_irn(res, irn_flags, in_reqs, n_res);
282  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
283  (void)attr; /* avoid potential warning */
284  init_amd64_attributes(res, op_mode, size);
285  attr->addr = addr;
286  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
287  out_infos[0].req = &amd64_class_reg_req_gp;
288  out_infos[1].req = &amd64_class_reg_req_flags;
289  out_infos[2].req = &arch_memory_requirement;
290 
291  verify_new_node(res);
292  return optimize_node(res);
293 }
294 
295 ir_node *new_bd_amd64_call(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, const amd64_call_addr_attr_t *attr_init)
296 {
297 
298 
299  ir_graph *const irg = get_irn_irg(block);
300  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_call, mode_T, arity, in);
301 
302  /* init node attributes */
303 
304  /* flags */
305  arch_irn_flags_t irn_flags = arch_irn_flags_none;
306  irn_flags |= arch_irn_flag_modify_flags;
307  be_info_init_irn(res, irn_flags, in_reqs, n_res);
308  amd64_call_addr_attr_t *const attr = (amd64_call_addr_attr_t*)get_irn_generic_attr(res);
309  (void)attr; /* avoid potential warning */
310  *attr = *attr_init;
311 
312  verify_new_node(res);
313  return optimize_node(res);
314 }
315 
316 ir_node *new_bd_amd64_cltd(dbg_info *dbgi, ir_node *block, ir_node *val)
317 {
318  static arch_register_req_t const *in_reqs[] = {
319  &amd64_single_reg_req_gp_rax,
320  };
321 
322  /* construct in array */
323  ir_node *const in[] = {
324  val,
325  };
326 
327  ir_graph *const irg = get_irn_irg(block);
328  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cltd, mode_Lu, 1, in);
329 
330  /* init node attributes */
331 
332  /* flags */
333  arch_irn_flags_t irn_flags = arch_irn_flags_none;
334  int const n_res = 1;
335  be_info_init_irn(res, irn_flags, in_reqs, n_res);
336  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
337  (void)attr; /* avoid potential warning */
338  amd64_op_mode_t op_mode = AMD64_OP_NONE;
339 x86_insn_size_t size = X86_SIZE_32;
340 
341  init_amd64_attributes(res, op_mode, size);
342  arch_set_additional_pressure(res, &amd64_reg_classes[CLASS_amd64_gp], 1);
343  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
344  out_infos[0].req = &amd64_single_reg_req_gp_rdx;
345 
346  verify_new_node(res);
347  return optimize_node(res);
348 }
349 
350 ir_node *new_bd_amd64_cmp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
351 {
352 
353 
354  ir_graph *const irg = get_irn_irg(block);
355  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cmp, mode_T, arity, in);
356 
357  /* init node attributes */
358 
359  /* flags */
360  arch_irn_flags_t irn_flags = arch_irn_flags_none;
361  irn_flags |= arch_irn_flag_modify_flags;
362  irn_flags |= arch_irn_flag_rematerializable;
363  int const n_res = 3;
364  be_info_init_irn(res, irn_flags, in_reqs, n_res);
365  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
366  (void)attr; /* avoid potential warning */
367  *attr = *attr_init;
368  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
369  out_infos[0].req = &arch_no_requirement;
370  out_infos[1].req = &amd64_class_reg_req_flags;
371  out_infos[2].req = &arch_memory_requirement;
372 
373  verify_new_node(res);
374  return optimize_node(res);
375 }
376 
377 ir_node *new_bd_amd64_cmpxchg(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
378 {
379 
380 
381  ir_graph *const irg = get_irn_irg(block);
382  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cmpxchg, mode_T, arity, in);
383 
384  /* init node attributes */
385 
386  /* flags */
387  arch_irn_flags_t irn_flags = arch_irn_flags_none;
388  irn_flags |= arch_irn_flag_modify_flags;
389  int const n_res = 3;
390  be_info_init_irn(res, irn_flags, in_reqs, n_res);
391  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
392  (void)attr; /* avoid potential warning */
393  *attr = *attr_init;
394  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
395  out_infos[0].req = &amd64_single_reg_req_gp_rax;
396  out_infos[1].req = &amd64_class_reg_req_flags;
397  out_infos[2].req = &arch_memory_requirement;
398 
399  verify_new_node(res);
400  return optimize_node(res);
401 }
402 
403 ir_node *new_bd_amd64_copyB(dbg_info *dbgi, ir_node *block, ir_node *dest, ir_node *source, ir_node *count, ir_node *mem, unsigned size)
404 {
405  static arch_register_req_t const *in_reqs[] = {
406  &amd64_single_reg_req_gp_rdi,
407  &amd64_single_reg_req_gp_rsi,
408  &amd64_single_reg_req_gp_rcx,
409  &arch_memory_requirement,
410  };
411 
412  /* construct in array */
413  ir_node *const in[] = {
414  dest,
415  source,
416  count,
417  mem,
418  };
419 
420  ir_graph *const irg = get_irn_irg(block);
421  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_copyB, mode_T, 4, in);
422 
423  /* init node attributes */
424 
425  /* flags */
426  arch_irn_flags_t irn_flags = arch_irn_flags_none;
427  int const n_res = 4;
428  be_info_init_irn(res, irn_flags, in_reqs, n_res);
429  amd64_copyb_attr_t *const attr = (amd64_copyb_attr_t*)get_irn_generic_attr(res);
430  (void)attr; /* avoid potential warning */
431  init_amd64_attributes(res, AMD64_OP_NONE, size);
432  init_amd64_copyb_attributes(res, size);
433  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
434  out_infos[0].req = &amd64_single_reg_req_gp_rdi;
435  out_infos[1].req = &amd64_single_reg_req_gp_rsi;
436  out_infos[2].req = &amd64_single_reg_req_gp_rcx;
437  out_infos[3].req = &arch_memory_requirement;
438 
439  verify_new_node(res);
440  return optimize_node(res);
441 }
442 
443 ir_node *new_bd_amd64_copyB_i(dbg_info *dbgi, ir_node *block, ir_node *dest, ir_node *source, ir_node *mem, unsigned size)
444 {
445  static arch_register_req_t const *in_reqs[] = {
446  &amd64_single_reg_req_gp_rdi,
447  &amd64_single_reg_req_gp_rsi,
448  &arch_memory_requirement,
449  };
450 
451  /* construct in array */
452  ir_node *const in[] = {
453  dest,
454  source,
455  mem,
456  };
457 
458  ir_graph *const irg = get_irn_irg(block);
459  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_copyB_i, mode_T, 3, in);
460 
461  /* init node attributes */
462 
463  /* flags */
464  arch_irn_flags_t irn_flags = arch_irn_flags_none;
465  int const n_res = 3;
466  be_info_init_irn(res, irn_flags, in_reqs, n_res);
467  amd64_copyb_attr_t *const attr = (amd64_copyb_attr_t*)get_irn_generic_attr(res);
468  (void)attr; /* avoid potential warning */
469  init_amd64_attributes(res, AMD64_OP_NONE, size);
470  init_amd64_copyb_attributes(res, size);
471  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
472  out_infos[0].req = &amd64_single_reg_req_gp_rdi;
473  out_infos[1].req = &amd64_single_reg_req_gp_rsi;
474  out_infos[2].req = &arch_memory_requirement;
475 
476  verify_new_node(res);
477  return optimize_node(res);
478 }
479 
480 ir_node *new_bd_amd64_cqto(dbg_info *dbgi, ir_node *block, ir_node *val)
481 {
482  static arch_register_req_t const *in_reqs[] = {
483  &amd64_single_reg_req_gp_rax,
484  };
485 
486  /* construct in array */
487  ir_node *const in[] = {
488  val,
489  };
490 
491  ir_graph *const irg = get_irn_irg(block);
492  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cqto, mode_Lu, 1, in);
493 
494  /* init node attributes */
495 
496  /* flags */
497  arch_irn_flags_t irn_flags = arch_irn_flags_none;
498  int const n_res = 1;
499  be_info_init_irn(res, irn_flags, in_reqs, n_res);
500  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
501  (void)attr; /* avoid potential warning */
502  amd64_op_mode_t op_mode = AMD64_OP_NONE;
503 x86_insn_size_t size = X86_SIZE_64;
504 
505  init_amd64_attributes(res, op_mode, size);
506  arch_set_additional_pressure(res, &amd64_reg_classes[CLASS_amd64_gp], 1);
507  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
508  out_infos[0].req = &amd64_single_reg_req_gp_rdx;
509 
510  verify_new_node(res);
511  return optimize_node(res);
512 }
513 
514 ir_node *new_bd_amd64_cvtsd2ss(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, amd64_op_mode_t op_mode, x86_addr_t addr)
515 {
516 
517 
518  ir_graph *const irg = get_irn_irg(block);
519  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvtsd2ss, mode_T, arity, in);
520 
521  /* init node attributes */
522 
523  /* flags */
524  arch_irn_flags_t irn_flags = arch_irn_flags_none;
525  int const n_res = 3;
526  be_info_init_irn(res, irn_flags, in_reqs, n_res);
527  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
528  (void)attr; /* avoid potential warning */
529  x86_insn_size_t size = X86_SIZE_64;
530 
531  init_amd64_attributes(res, op_mode, size);
532  attr->addr = addr;
533  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
534  out_infos[0].req = &amd64_class_reg_req_xmm;
535  out_infos[1].req = &arch_no_requirement;
536  out_infos[2].req = &arch_memory_requirement;
537 
538  verify_new_node(res);
539  return optimize_node(res);
540 }
541 
542 ir_node *new_bd_amd64_cvtsi2sd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
543 {
544 
545 
546  ir_graph *const irg = get_irn_irg(block);
547  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvtsi2sd, mode_T, arity, in);
548 
549  /* init node attributes */
550 
551  /* flags */
552  arch_irn_flags_t irn_flags = arch_irn_flags_none;
553  int const n_res = 3;
554  be_info_init_irn(res, irn_flags, in_reqs, n_res);
555  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
556  (void)attr; /* avoid potential warning */
557  init_amd64_attributes(res, op_mode, size);
558  attr->addr = addr;
559  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
560  out_infos[0].req = &amd64_class_reg_req_xmm;
561  out_infos[1].req = &arch_no_requirement;
562  out_infos[2].req = &arch_memory_requirement;
563 
564  verify_new_node(res);
565  return optimize_node(res);
566 }
567 
568 ir_node *new_bd_amd64_cvtsi2ss(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
569 {
570 
571 
572  ir_graph *const irg = get_irn_irg(block);
573  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvtsi2ss, mode_T, arity, in);
574 
575  /* init node attributes */
576 
577  /* flags */
578  arch_irn_flags_t irn_flags = arch_irn_flags_none;
579  int const n_res = 3;
580  be_info_init_irn(res, irn_flags, in_reqs, n_res);
581  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
582  (void)attr; /* avoid potential warning */
583  init_amd64_attributes(res, op_mode, size);
584  attr->addr = addr;
585  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
586  out_infos[0].req = &amd64_class_reg_req_xmm;
587  out_infos[1].req = &arch_no_requirement;
588  out_infos[2].req = &arch_memory_requirement;
589 
590  verify_new_node(res);
591  return optimize_node(res);
592 }
593 
594 ir_node *new_bd_amd64_cvtss2sd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
595 {
596 
597 
598  ir_graph *const irg = get_irn_irg(block);
599  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvtss2sd, mode_T, arity, in);
600 
601  /* init node attributes */
602 
603  /* flags */
604  arch_irn_flags_t irn_flags = arch_irn_flags_none;
605  int const n_res = 3;
606  be_info_init_irn(res, irn_flags, in_reqs, n_res);
607  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
608  (void)attr; /* avoid potential warning */
609  init_amd64_attributes(res, op_mode, size);
610  attr->addr = addr;
611  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
612  out_infos[0].req = &amd64_class_reg_req_xmm;
613  out_infos[1].req = &arch_no_requirement;
614  out_infos[2].req = &arch_memory_requirement;
615 
616  verify_new_node(res);
617  return optimize_node(res);
618 }
619 
620 ir_node *new_bd_amd64_cvttsd2si(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
621 {
622 
623 
624  ir_graph *const irg = get_irn_irg(block);
625  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvttsd2si, mode_T, arity, in);
626 
627  /* init node attributes */
628 
629  /* flags */
630  arch_irn_flags_t irn_flags = arch_irn_flags_none;
631  int const n_res = 3;
632  be_info_init_irn(res, irn_flags, in_reqs, n_res);
633  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
634  (void)attr; /* avoid potential warning */
635  init_amd64_attributes(res, op_mode, size);
636  attr->addr = addr;
637  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
638  out_infos[0].req = &amd64_class_reg_req_gp;
639  out_infos[1].req = &arch_no_requirement;
640  out_infos[2].req = &arch_memory_requirement;
641 
642  verify_new_node(res);
643  return optimize_node(res);
644 }
645 
646 ir_node *new_bd_amd64_cvttss2si(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
647 {
648 
649 
650  ir_graph *const irg = get_irn_irg(block);
651  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvttss2si, mode_T, arity, in);
652 
653  /* init node attributes */
654 
655  /* flags */
656  arch_irn_flags_t irn_flags = arch_irn_flags_none;
657  int const n_res = 3;
658  be_info_init_irn(res, irn_flags, in_reqs, n_res);
659  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
660  (void)attr; /* avoid potential warning */
661  init_amd64_attributes(res, op_mode, size);
662  attr->addr = addr;
663  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
664  out_infos[0].req = &amd64_class_reg_req_gp;
665  out_infos[1].req = &arch_no_requirement;
666  out_infos[2].req = &arch_memory_requirement;
667 
668  verify_new_node(res);
669  return optimize_node(res);
670 }
671 
672 ir_node *new_bd_amd64_div(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size)
673 {
674 
675 
676  ir_graph *const irg = get_irn_irg(block);
677  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_div, mode_T, arity, in);
678 
679  /* init node attributes */
680 
681  /* flags */
682  arch_irn_flags_t irn_flags = arch_irn_flags_none;
683  irn_flags |= arch_irn_flag_modify_flags;
684  int const n_res = 4;
685  be_info_init_irn(res, irn_flags, in_reqs, n_res);
686  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
687  (void)attr; /* avoid potential warning */
688  x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };
689 amd64_op_mode_t op_mode = AMD64_OP_REG;
690 
691  init_amd64_attributes(res, op_mode, size);
692  attr->addr = addr;
693  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
694  out_infos[0].req = &amd64_single_reg_req_gp_rax;
695  out_infos[1].req = &amd64_class_reg_req_flags;
696  out_infos[2].req = &arch_memory_requirement;
697  out_infos[3].req = &amd64_single_reg_req_gp_rdx;
698 
699  verify_new_node(res);
700  return optimize_node(res);
701 }
702 
703 ir_node *new_bd_amd64_divs(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
704 {
705 
706 
707  ir_graph *const irg = get_irn_irg(block);
708  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_divs, mode_T, arity, in);
709 
710  /* init node attributes */
711 
712  /* flags */
713  arch_irn_flags_t irn_flags = arch_irn_flags_none;
714  irn_flags |= arch_irn_flag_rematerializable;
715  int const n_res = 3;
716  be_info_init_irn(res, irn_flags, in_reqs, n_res);
717  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
718  (void)attr; /* avoid potential warning */
719  *attr = *attr_init;
720  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
721  out_infos[0].req = &amd64_class_reg_req_xmm;
722  out_infos[1].req = &arch_no_requirement;
723  out_infos[2].req = &arch_memory_requirement;
724 
725  verify_new_node(res);
726  return optimize_node(res);
727 }
728 
729 ir_node *new_bd_amd64_fadd(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
730 {
731  static arch_register_req_t const *in_reqs[] = {
732  &amd64_class_reg_req_x87,
733  &amd64_class_reg_req_x87,
734  };
735 
736  /* construct in array */
737  ir_node *const in[] = {
738  left,
739  right,
740  };
741 
742  ir_graph *const irg = get_irn_irg(block);
743  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fadd, x86_mode_E, 2, in);
744 
745  /* init node attributes */
746 
747  /* flags */
748  arch_irn_flags_t irn_flags = arch_irn_flags_none;
749  irn_flags |= arch_irn_flag_rematerializable;
750  int const n_res = 1;
751  be_info_init_irn(res, irn_flags, in_reqs, n_res);
752  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
753  (void)attr; /* avoid potential warning */
754  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
755 
756  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
757  out_infos[0].req = &amd64_class_reg_req_x87;
758 
759  verify_new_node(res);
760  return optimize_node(res);
761 }
762 
763 ir_node *new_bd_amd64_fchs(dbg_info *dbgi, ir_node *block, ir_node *value)
764 {
765  static arch_register_req_t const *in_reqs[] = {
766  &amd64_class_reg_req_x87,
767  };
768 
769  /* construct in array */
770  ir_node *const in[] = {
771  value,
772  };
773 
774  ir_graph *const irg = get_irn_irg(block);
775  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fchs, x86_mode_E, 1, in);
776 
777  /* init node attributes */
778 
779  /* flags */
780  arch_irn_flags_t irn_flags = arch_irn_flags_none;
781  irn_flags |= arch_irn_flag_rematerializable;
782  int const n_res = 1;
783  be_info_init_irn(res, irn_flags, in_reqs, n_res);
784  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
785  (void)attr; /* avoid potential warning */
786  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
787 
788  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
789  out_infos[0].req = &amd64_class_reg_req_x87;
790 
791  verify_new_node(res);
792  return optimize_node(res);
793 }
794 
795 ir_node *new_bd_amd64_fdiv(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
796 {
797  static arch_register_req_t const *in_reqs[] = {
798  &amd64_class_reg_req_x87,
799  &amd64_class_reg_req_x87,
800  };
801 
802  /* construct in array */
803  ir_node *const in[] = {
804  left,
805  right,
806  };
807 
808  ir_graph *const irg = get_irn_irg(block);
809  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fdiv, x86_mode_E, 2, in);
810 
811  /* init node attributes */
812 
813  /* flags */
814  arch_irn_flags_t irn_flags = arch_irn_flags_none;
815  irn_flags |= arch_irn_flag_rematerializable;
816  int const n_res = 1;
817  be_info_init_irn(res, irn_flags, in_reqs, n_res);
818  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
819  (void)attr; /* avoid potential warning */
820  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
821 
822  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
823  out_infos[0].req = &amd64_class_reg_req_x87;
824 
825  verify_new_node(res);
826  return optimize_node(res);
827 }
828 
829 ir_node *new_bd_amd64_fdup(dbg_info *dbgi, ir_node *block, ir_node *val, const arch_register_t *reg)
830 {
831  static arch_register_req_t const *in_reqs[] = {
832  &amd64_class_reg_req_x87,
833  };
834 
835  /* construct in array */
836  ir_node *const in[] = {
837  val,
838  };
839 
840  ir_graph *const irg = get_irn_irg(block);
841  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fdup, x86_mode_E, 1, in);
842 
843  /* init node attributes */
844 
845  /* flags */
846  arch_irn_flags_t irn_flags = arch_irn_flags_none;
847  int const n_res = 1;
848  be_info_init_irn(res, irn_flags, in_reqs, n_res);
849  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
850  (void)attr; /* avoid potential warning */
851  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
852 
853  attr->x87.reg = reg;
854  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
855  out_infos[0].req = &amd64_class_reg_req_x87;
856 
857  verify_new_node(res);
858  return optimize_node(res);
859 }
860 
861 ir_node *new_bd_amd64_fild(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
862 {
863 
864 
865  ir_graph *const irg = get_irn_irg(block);
866  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fild, mode_T, arity, in);
867 
868  /* init node attributes */
869 
870  /* flags */
871  arch_irn_flags_t irn_flags = arch_irn_flags_none;
872  irn_flags |= arch_irn_flag_rematerializable;
873  int const n_res = 3;
874  be_info_init_irn(res, irn_flags, in_reqs, n_res);
875  amd64_x87_addr_attr_t *const attr = (amd64_x87_addr_attr_t*)get_irn_generic_attr(res);
876  (void)attr; /* avoid potential warning */
877  init_amd64_attributes(res, op_mode, size);
878  attr->base.addr = addr;
879 
880  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
881  out_infos[0].req = &amd64_class_reg_req_x87;
882  out_infos[1].req = &arch_no_requirement;
883  out_infos[2].req = &arch_memory_requirement;
884 
885  verify_new_node(res);
886  return optimize_node(res);
887 }
888 
889 ir_node *new_bd_amd64_fisttp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
890 {
891 
892 
893  ir_graph *const irg = get_irn_irg(block);
894  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fisttp, mode_M, arity, in);
895 
896  /* init node attributes */
897 
898  /* flags */
899  arch_irn_flags_t irn_flags = arch_irn_flags_none;
900  int const n_res = 1;
901  be_info_init_irn(res, irn_flags, in_reqs, n_res);
902  amd64_x87_binop_addr_attr_t *const attr = (amd64_x87_binop_addr_attr_t*)get_irn_generic_attr(res);
903  (void)attr; /* avoid potential warning */
904  attr->base = *attr_init;
905  assert(attr_init->base.base.op_mode == AMD64_OP_ADDR_REG);
906  attr->base.base.base.op_mode = AMD64_OP_X87_ADDR_REG;
907 
908  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
909  out_infos[0].req = &arch_memory_requirement;
910 
911  verify_new_node(res);
912  return optimize_node(res);
913 }
914 
915 ir_node *new_bd_amd64_fld(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
916 {
917 
918 
919  ir_graph *const irg = get_irn_irg(block);
920  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fld, mode_T, arity, in);
921 
922  /* init node attributes */
923 
924  /* flags */
925  arch_irn_flags_t irn_flags = arch_irn_flags_none;
926  irn_flags |= arch_irn_flag_rematerializable;
927  int const n_res = 3;
928  be_info_init_irn(res, irn_flags, in_reqs, n_res);
929  amd64_x87_addr_attr_t *const attr = (amd64_x87_addr_attr_t*)get_irn_generic_attr(res);
930  (void)attr; /* avoid potential warning */
931  init_amd64_attributes(res, op_mode, size);
932  attr->base.addr = addr;
933 
934  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
935  out_infos[0].req = &amd64_class_reg_req_x87;
936  out_infos[1].req = &arch_no_requirement;
937  out_infos[2].req = &arch_memory_requirement;
938 
939  verify_new_node(res);
940  return optimize_node(res);
941 }
942 
943 ir_node *new_bd_amd64_fld1(dbg_info *dbgi, ir_node *block)
944 {
945  arch_register_req_t const **const in_reqs = NULL;
946 
947 
948  ir_graph *const irg = get_irn_irg(block);
949  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fld1, x86_mode_E, 0, NULL);
950 
951  /* init node attributes */
952 
953  /* flags */
954  arch_irn_flags_t irn_flags = arch_irn_flags_none;
955  irn_flags |= arch_irn_flag_rematerializable;
956  int const n_res = 1;
957  be_info_init_irn(res, irn_flags, in_reqs, n_res);
958  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
959  (void)attr; /* avoid potential warning */
960  amd64_op_mode_t op_mode = AMD64_OP_X87;
961 x86_insn_size_t size = X86_SIZE_80;
962 
963  init_amd64_attributes(res, op_mode, size);
964  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
965  out_infos[0].req = &amd64_class_reg_req_x87;
966 
967  verify_new_node(res);
968  return optimize_node(res);
969 }
970 
971 ir_node *new_bd_amd64_fldz(dbg_info *dbgi, ir_node *block)
972 {
973  arch_register_req_t const **const in_reqs = NULL;
974 
975 
976  ir_graph *const irg = get_irn_irg(block);
977  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fldz, x86_mode_E, 0, NULL);
978 
979  /* init node attributes */
980 
981  /* flags */
982  arch_irn_flags_t irn_flags = arch_irn_flags_none;
983  irn_flags |= arch_irn_flag_rematerializable;
984  int const n_res = 1;
985  be_info_init_irn(res, irn_flags, in_reqs, n_res);
986  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
987  (void)attr; /* avoid potential warning */
988  amd64_op_mode_t op_mode = AMD64_OP_X87;
989 x86_insn_size_t size = X86_SIZE_80;
990 
991  init_amd64_attributes(res, op_mode, size);
992  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
993  out_infos[0].req = &amd64_class_reg_req_x87;
994 
995  verify_new_node(res);
996  return optimize_node(res);
997 }
998 
999 ir_node *new_bd_amd64_fmul(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
1000 {
1001  static arch_register_req_t const *in_reqs[] = {
1002  &amd64_class_reg_req_x87,
1003  &amd64_class_reg_req_x87,
1004  };
1005 
1006  /* construct in array */
1007  ir_node *const in[] = {
1008  left,
1009  right,
1010  };
1011 
1012  ir_graph *const irg = get_irn_irg(block);
1013  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fmul, x86_mode_E, 2, in);
1014 
1015  /* init node attributes */
1016 
1017  /* flags */
1018  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1019  irn_flags |= arch_irn_flag_rematerializable;
1020  int const n_res = 1;
1021  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1022  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
1023  (void)attr; /* avoid potential warning */
1024  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
1025 
1026  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1027  out_infos[0].req = &amd64_class_reg_req_x87;
1028 
1029  verify_new_node(res);
1030  return optimize_node(res);
1031 }
1032 
1033 ir_node *new_bd_amd64_fpop(dbg_info *dbgi, ir_node *block, const arch_register_t *reg)
1034 {
1035  arch_register_req_t const **const in_reqs = NULL;
1036 
1037 
1038  ir_graph *const irg = get_irn_irg(block);
1039  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fpop, mode_ANY, 0, NULL);
1040 
1041  /* init node attributes */
1042 
1043  /* flags */
1044  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1045  int const n_res = 1;
1046  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1047  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
1048  (void)attr; /* avoid potential warning */
1049  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
1050 
1051  attr->x87.reg = reg;
1052  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1053  out_infos[0].req = &arch_no_requirement;
1054 
1055  verify_new_node(res);
1056  return optimize_node(res);
1057 }
1058 
1059 ir_node *new_bd_amd64_fst(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1060 {
1061 
1062 
1063  ir_graph *const irg = get_irn_irg(block);
1064  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fst, mode_M, arity, in);
1065 
1066  /* init node attributes */
1067 
1068  /* flags */
1069  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1070  int const n_res = 1;
1071  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1072  amd64_x87_binop_addr_attr_t *const attr = (amd64_x87_binop_addr_attr_t*)get_irn_generic_attr(res);
1073  (void)attr; /* avoid potential warning */
1074  attr->base = *attr_init;
1075  assert(attr_init->base.base.op_mode == AMD64_OP_ADDR_REG);
1076  attr->base.base.base.op_mode = AMD64_OP_X87_ADDR_REG;
1077 
1078  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1079  out_infos[0].req = &arch_memory_requirement;
1080 
1081  verify_new_node(res);
1082  return optimize_node(res);
1083 }
1084 
1085 ir_node *new_bd_amd64_fstp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1086 {
1087 
1088 
1089  ir_graph *const irg = get_irn_irg(block);
1090  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fstp, mode_M, arity, in);
1091 
1092  /* init node attributes */
1093 
1094  /* flags */
1095  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1096  int const n_res = 1;
1097  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1098  amd64_x87_binop_addr_attr_t *const attr = (amd64_x87_binop_addr_attr_t*)get_irn_generic_attr(res);
1099  (void)attr; /* avoid potential warning */
1100  attr->base = *attr_init;
1101  assert(attr_init->base.base.op_mode == AMD64_OP_ADDR_REG);
1102  attr->base.base.base.op_mode = AMD64_OP_X87_ADDR_REG;
1103 
1104  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1105  out_infos[0].req = &arch_memory_requirement;
1106 
1107  verify_new_node(res);
1108  return optimize_node(res);
1109 }
1110 
1111 ir_node *new_bd_amd64_fsub(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
1112 {
1113  static arch_register_req_t const *in_reqs[] = {
1114  &amd64_class_reg_req_x87,
1115  &amd64_class_reg_req_x87,
1116  };
1117 
1118  /* construct in array */
1119  ir_node *const in[] = {
1120  left,
1121  right,
1122  };
1123 
1124  ir_graph *const irg = get_irn_irg(block);
1125  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fsub, x86_mode_E, 2, in);
1126 
1127  /* init node attributes */
1128 
1129  /* flags */
1130  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1131  irn_flags |= arch_irn_flag_rematerializable;
1132  int const n_res = 1;
1133  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1134  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
1135  (void)attr; /* avoid potential warning */
1136  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
1137 
1138  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1139  out_infos[0].req = &amd64_class_reg_req_x87;
1140 
1141  verify_new_node(res);
1142  return optimize_node(res);
1143 }
1144 
1145 ir_node *new_bd_amd64_fucomi(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
1146 {
1147  static arch_register_req_t const *in_reqs[] = {
1148  &amd64_class_reg_req_x87,
1149  &amd64_class_reg_req_x87,
1150  };
1151 
1152  /* construct in array */
1153  ir_node *const in[] = {
1154  left,
1155  right,
1156  };
1157 
1158  ir_graph *const irg = get_irn_irg(block);
1159  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fucomi, mode_Iu, 2, in);
1160 
1161  /* init node attributes */
1162 
1163  /* flags */
1164  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1165  irn_flags |= arch_irn_flag_rematerializable;
1166  int const n_res = 1;
1167  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1168  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
1169  (void)attr; /* avoid potential warning */
1170  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
1171 
1172  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1173  out_infos[0].req = &amd64_class_reg_req_flags;
1174 
1175  verify_new_node(res);
1176  return optimize_node(res);
1177 }
1178 
1179 ir_node *new_bd_amd64_fxch(dbg_info *dbgi, ir_node *block, const arch_register_t *reg)
1180 {
1181  arch_register_req_t const **const in_reqs = NULL;
1182 
1183 
1184  ir_graph *const irg = get_irn_irg(block);
1185  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fxch, mode_ANY, 0, NULL);
1186 
1187  /* init node attributes */
1188 
1189  /* flags */
1190  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1191  int const n_res = 1;
1192  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1193  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
1194  (void)attr; /* avoid potential warning */
1195  init_amd64_attributes(res, AMD64_OP_X87, X86_SIZE_80);
1196 
1197  attr->x87.reg = reg;
1198  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1199  out_infos[0].req = &arch_no_requirement;
1200 
1201  verify_new_node(res);
1202  return optimize_node(res);
1203 }
1204 
1205 ir_node *new_bd_amd64_haddpd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1206 {
1207 
1208 
1209  ir_graph *const irg = get_irn_irg(block);
1210  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_haddpd, mode_T, arity, in);
1211 
1212  /* init node attributes */
1213 
1214  /* flags */
1215  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1216  irn_flags |= arch_irn_flag_rematerializable;
1217  int const n_res = 3;
1218  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1219  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1220  (void)attr; /* avoid potential warning */
1221  *attr = *attr_init;
1222  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1223  out_infos[0].req = &amd64_class_reg_req_xmm;
1224  out_infos[1].req = &arch_no_requirement;
1225  out_infos[2].req = &arch_memory_requirement;
1226 
1227  verify_new_node(res);
1228  return optimize_node(res);
1229 }
1230 
1231 ir_node *new_bd_amd64_idiv(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size)
1232 {
1233 
1234 
1235  ir_graph *const irg = get_irn_irg(block);
1236  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_idiv, mode_T, arity, in);
1237 
1238  /* init node attributes */
1239 
1240  /* flags */
1241  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1242  irn_flags |= arch_irn_flag_modify_flags;
1243  int const n_res = 4;
1244  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1245  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1246  (void)attr; /* avoid potential warning */
1247  x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };
1248 amd64_op_mode_t op_mode = AMD64_OP_REG;
1249 
1250  init_amd64_attributes(res, op_mode, size);
1251  attr->addr = addr;
1252  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1253  out_infos[0].req = &amd64_single_reg_req_gp_rax;
1254  out_infos[1].req = &amd64_class_reg_req_flags;
1255  out_infos[2].req = &arch_memory_requirement;
1256  out_infos[3].req = &amd64_single_reg_req_gp_rdx;
1257 
1258  verify_new_node(res);
1259  return optimize_node(res);
1260 }
1261 
1262 ir_node *new_bd_amd64_ijmp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1263 {
1264 
1265 
1266  ir_graph *const irg = get_irn_irg(block);
1267  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_ijmp, mode_T, arity, in);
1268 
1269  /* init node attributes */
1270 
1271  /* flags */
1272  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1273  int const n_res = 3;
1274  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1275  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1276  (void)attr; /* avoid potential warning */
1277  init_amd64_attributes(res, op_mode, size);
1278  attr->addr = addr;
1279  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1280  out_infos[0].req = &arch_exec_requirement;
1281  out_infos[1].req = &arch_no_requirement;
1282  out_infos[2].req = &arch_memory_requirement;
1283 
1284  verify_new_node(res);
1285  return optimize_node(res);
1286 }
1287 
1288 ir_node *new_bd_amd64_imul(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1289 {
1290 
1291 
1292  ir_graph *const irg = get_irn_irg(block);
1293  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_imul, mode_T, arity, in);
1294 
1295  /* init node attributes */
1296 
1297  /* flags */
1298  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1299  irn_flags |= arch_irn_flag_modify_flags;
1300  irn_flags |= arch_irn_flag_rematerializable;
1301  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
1302  int const n_res = 3;
1303  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1304  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1305  (void)attr; /* avoid potential warning */
1306  *attr = *attr_init;
1307  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1308  out_infos[0].req = &amd64_class_reg_req_gp;
1309  out_infos[1].req = &amd64_class_reg_req_flags;
1310  out_infos[2].req = &arch_memory_requirement;
1311 
1312  verify_new_node(res);
1313  return optimize_node(res);
1314 }
1315 
1316 ir_node *new_bd_amd64_imul_1op(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1317 {
1318 
1319 
1320  ir_graph *const irg = get_irn_irg(block);
1321  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_imul_1op, mode_T, arity, in);
1322 
1323  /* init node attributes */
1324 
1325  /* flags */
1326  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1327  irn_flags |= arch_irn_flag_modify_flags;
1328  int const n_res = 4;
1329  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1330  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1331  (void)attr; /* avoid potential warning */
1332  init_amd64_attributes(res, op_mode, size);
1333  attr->addr = addr;
1334  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1335  out_infos[0].req = &amd64_single_reg_req_gp_rax;
1336  out_infos[1].req = &amd64_class_reg_req_flags;
1337  out_infos[2].req = &arch_memory_requirement;
1338  out_infos[3].req = &amd64_single_reg_req_gp_rdx;
1339 
1340  verify_new_node(res);
1341  return optimize_node(res);
1342 }
1343 
1344 ir_node *new_bd_amd64_jcc(dbg_info *dbgi, ir_node *block, ir_node *flags, x86_condition_code_t cc)
1345 {
1346  static arch_register_req_t const *in_reqs[] = {
1347  &amd64_class_reg_req_flags,
1348  };
1349 
1350  /* construct in array */
1351  ir_node *const in[] = {
1352  flags,
1353  };
1354 
1355  ir_graph *const irg = get_irn_irg(block);
1356  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_jcc, mode_T, 1, in);
1357 
1358  /* init node attributes */
1359 
1360  /* flags */
1361  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1362  int const n_res = 2;
1363  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1364  amd64_cc_attr_t *const attr = (amd64_cc_attr_t*)get_irn_generic_attr(res);
1365  (void)attr; /* avoid potential warning */
1366  x86_insn_size_t size = X86_SIZE_64;
1367  init_amd64_attributes(res, AMD64_OP_CC, size);
1368  init_amd64_cc_attributes(res, cc);
1369  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1370  out_infos[0].req = &arch_exec_requirement;
1371  out_infos[1].req = &arch_exec_requirement;
1372 
1373  verify_new_node(res);
1374  return optimize_node(res);
1375 }
1376 
1377 ir_node *new_bd_amd64_jmp(dbg_info *dbgi, ir_node *block)
1378 {
1379  arch_register_req_t const **const in_reqs = NULL;
1380 
1381 
1382  ir_graph *const irg = get_irn_irg(block);
1383  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_jmp, mode_X, 0, NULL);
1384 
1385  /* init node attributes */
1386 
1387  /* flags */
1388  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1389  irn_flags |= arch_irn_flag_simple_jump;
1390  irn_flags |= arch_irn_flag_fallthrough;
1391  int const n_res = 1;
1392  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1393  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
1394  (void)attr; /* avoid potential warning */
1395  amd64_op_mode_t op_mode = AMD64_OP_NONE;
1396 x86_insn_size_t size = X86_SIZE_64;
1397 
1398  init_amd64_attributes(res, op_mode, size);
1399  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1400  out_infos[0].req = &arch_exec_requirement;
1401 
1402  verify_new_node(res);
1403  return optimize_node(res);
1404 }
1405 
1406 ir_node *new_bd_amd64_jmp_switch(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, amd64_op_mode_t op_mode, x86_insn_size_t size, const x86_addr_t *addr, const ir_switch_table *table, ir_entity *table_entity)
1407 {
1408 
1409 
1410  ir_graph *const irg = get_irn_irg(block);
1411  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_jmp_switch, mode_T, arity, in);
1412 
1413  /* init node attributes */
1414 
1415  /* flags */
1416  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1417  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1418  amd64_switch_jmp_attr_t *const attr = (amd64_switch_jmp_attr_t*)get_irn_generic_attr(res);
1419  (void)attr; /* avoid potential warning */
1420  init_amd64_attributes(res, op_mode, size);
1421  attr->base.addr = *addr;
1422  be_switch_attr_init(res, &attr->swtch, table, table_entity);
1423 
1424  verify_new_node(res);
1425  return optimize_node(res);
1426 }
1427 
1428 ir_node *new_bd_amd64_l_haddpd(dbg_info *dbgi, ir_node *block, ir_node *arg0, ir_node *arg1)
1429 {
1430 
1431  /* construct in array */
1432  ir_node *const in[] = {
1433  arg0,
1434  arg1,
1435  };
1436 
1437  ir_graph *const irg = get_irn_irg(block);
1438  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_l_haddpd, amd64_mode_xmm, 2, in);
1439 
1440  /* init node attributes */
1441 
1442  verify_new_node(res);
1443  return optimize_node(res);
1444 }
1445 
1446 ir_node *new_bd_amd64_l_punpckldq(dbg_info *dbgi, ir_node *block, ir_node *arg0, ir_node *arg1)
1447 {
1448 
1449  /* construct in array */
1450  ir_node *const in[] = {
1451  arg0,
1452  arg1,
1453  };
1454 
1455  ir_graph *const irg = get_irn_irg(block);
1456  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_l_punpckldq, amd64_mode_xmm, 2, in);
1457 
1458  /* init node attributes */
1459 
1460  verify_new_node(res);
1461  return optimize_node(res);
1462 }
1463 
1464 ir_node *new_bd_amd64_l_subpd(dbg_info *dbgi, ir_node *block, ir_node *arg0, ir_node *arg1)
1465 {
1466 
1467  /* construct in array */
1468  ir_node *const in[] = {
1469  arg0,
1470  arg1,
1471  };
1472 
1473  ir_graph *const irg = get_irn_irg(block);
1474  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_l_subpd, amd64_mode_xmm, 2, in);
1475 
1476  /* init node attributes */
1477 
1478  verify_new_node(res);
1479  return optimize_node(res);
1480 }
1481 
1482 ir_node *new_bd_amd64_lea(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, x86_addr_t addr)
1483 {
1484 
1485 
1486  ir_graph *const irg = get_irn_irg(block);
1487  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_lea, mode_Lu, arity, in);
1488 
1489  /* init node attributes */
1490 
1491  /* flags */
1492  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1493  irn_flags |= arch_irn_flag_rematerializable;
1494  int const n_res = 1;
1495  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1496  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1497  (void)attr; /* avoid potential warning */
1498  amd64_op_mode_t op_mode = AMD64_OP_ADDR;
1499 
1500  init_amd64_attributes(res, op_mode, size);
1501  attr->addr = addr;
1502  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1503  out_infos[0].req = &amd64_class_reg_req_gp;
1504 
1505  verify_new_node(res);
1506  return optimize_node(res);
1507 }
1508 
1509 ir_node *new_bd_amd64_leave(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
1510 {
1511  static arch_register_req_t const *in_reqs[] = {
1512  &amd64_single_reg_req_gp_rbp,
1513  &arch_memory_requirement,
1514  };
1515 
1516  /* construct in array */
1517  ir_node *const in[] = {
1518  op0,
1519  op1,
1520  };
1521 
1522  ir_graph *const irg = get_irn_irg(block);
1523  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_leave, mode_T, 2, in);
1524 
1525  /* init node attributes */
1526 
1527  /* flags */
1528  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1529  int const n_res = 3;
1530  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1531  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
1532  (void)attr; /* avoid potential warning */
1533  amd64_op_mode_t op_mode = AMD64_OP_NONE;
1534 x86_insn_size_t size = X86_SIZE_64;
1535 
1536  init_amd64_attributes(res, op_mode, size);
1537  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1538  out_infos[0].req = &amd64_requirements_gp_rbp_I;
1539  out_infos[1].req = &arch_memory_requirement;
1540  out_infos[2].req = &amd64_requirements_gp_rsp_I;
1541 
1542  verify_new_node(res);
1543  return optimize_node(res);
1544 }
1545 
1546 ir_node *new_bd_amd64_mov_gp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1547 {
1548 
1549 
1550  ir_graph *const irg = get_irn_irg(block);
1551  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_mov_gp, mode_T, arity, in);
1552 
1553  /* init node attributes */
1554 
1555  /* flags */
1556  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1557  int const n_res = 3;
1558  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1559  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1560  (void)attr; /* avoid potential warning */
1561  init_amd64_attributes(res, op_mode, size);
1562  attr->addr = addr;
1563  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1564  out_infos[0].req = &amd64_class_reg_req_gp;
1565  out_infos[1].req = &arch_no_requirement;
1566  out_infos[2].req = &arch_memory_requirement;
1567 
1568  verify_new_node(res);
1569  return optimize_node(res);
1570 }
1571 
1572 ir_node *new_bd_amd64_mov_imm(dbg_info *dbgi, ir_node *block, x86_insn_size_t size, const amd64_imm64_t *imm)
1573 {
1574  arch_register_req_t const **const in_reqs = NULL;
1575 
1576 
1577  ir_graph *const irg = get_irn_irg(block);
1578  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_mov_imm, mode_Lu, 0, NULL);
1579 
1580  /* init node attributes */
1581 
1582  /* flags */
1583  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1584  irn_flags |= arch_irn_flag_rematerializable;
1585  int const n_res = 1;
1586  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1587  amd64_movimm_attr_t *const attr = (amd64_movimm_attr_t*)get_irn_generic_attr(res);
1588  (void)attr; /* avoid potential warning */
1589  init_amd64_attributes(res, AMD64_OP_IMM64, size);
1590  init_amd64_movimm_attributes(res, imm);
1591  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1592  out_infos[0].req = &amd64_class_reg_req_gp;
1593 
1594  verify_new_node(res);
1595  return optimize_node(res);
1596 }
1597 
1598 ir_node *new_bd_amd64_mov_store(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1599 {
1600 
1601 
1602  ir_graph *const irg = get_irn_irg(block);
1603  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_mov_store, mode_M, arity, in);
1604 
1605  /* init node attributes */
1606 
1607  /* flags */
1608  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1609  int const n_res = 1;
1610  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1611  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1612  (void)attr; /* avoid potential warning */
1613  *attr = *attr_init;
1614  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1615  out_infos[0].req = &arch_memory_requirement;
1616 
1617  verify_new_node(res);
1618  return optimize_node(res);
1619 }
1620 
1621 ir_node *new_bd_amd64_movd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, amd64_op_mode_t op_mode, x86_addr_t addr)
1622 {
1623 
1624 
1625  ir_graph *const irg = get_irn_irg(block);
1626  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movd, mode_T, arity, in);
1627 
1628  /* init node attributes */
1629 
1630  /* flags */
1631  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1632  int const n_res = 3;
1633  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1634  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1635  (void)attr; /* avoid potential warning */
1636  x86_insn_size_t size = X86_SIZE_64;
1637 
1638  init_amd64_attributes(res, op_mode, size);
1639  attr->addr = addr;
1640  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1641  out_infos[0].req = &amd64_class_reg_req_xmm;
1642  out_infos[1].req = &arch_no_requirement;
1643  out_infos[2].req = &arch_memory_requirement;
1644 
1645  verify_new_node(res);
1646  return optimize_node(res);
1647 }
1648 
1649 ir_node *new_bd_amd64_movd_gp_xmm(dbg_info *dbgi, ir_node *block, ir_node *operand, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1650 {
1651  static arch_register_req_t const *in_reqs[] = {
1652  &amd64_class_reg_req_gp,
1653  };
1654 
1655  /* construct in array */
1656  ir_node *const in[] = {
1657  operand,
1658  };
1659 
1660  ir_graph *const irg = get_irn_irg(block);
1661  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movd_gp_xmm, amd64_mode_xmm, 1, in);
1662 
1663  /* init node attributes */
1664 
1665  /* flags */
1666  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1667  int const n_res = 1;
1668  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1669  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1670  (void)attr; /* avoid potential warning */
1671  init_amd64_attributes(res, op_mode, size);
1672  attr->addr = addr;
1673  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1674  out_infos[0].req = &amd64_class_reg_req_xmm;
1675 
1676  verify_new_node(res);
1677  return optimize_node(res);
1678 }
1679 
1680 ir_node *new_bd_amd64_movd_xmm_gp(dbg_info *dbgi, ir_node *block, ir_node *operand, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1681 {
1682  static arch_register_req_t const *in_reqs[] = {
1683  &amd64_class_reg_req_xmm,
1684  };
1685 
1686  /* construct in array */
1687  ir_node *const in[] = {
1688  operand,
1689  };
1690 
1691  ir_graph *const irg = get_irn_irg(block);
1692  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movd_xmm_gp, mode_Lu, 1, in);
1693 
1694  /* init node attributes */
1695 
1696  /* flags */
1697  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1698  int const n_res = 1;
1699  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1700  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1701  (void)attr; /* avoid potential warning */
1702  init_amd64_attributes(res, op_mode, size);
1703  attr->addr = addr;
1704  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1705  out_infos[0].req = &amd64_class_reg_req_gp;
1706 
1707  verify_new_node(res);
1708  return optimize_node(res);
1709 }
1710 
1711 ir_node *new_bd_amd64_movdqa(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, amd64_op_mode_t op_mode, x86_addr_t addr)
1712 {
1713 
1714 
1715  ir_graph *const irg = get_irn_irg(block);
1716  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movdqa, mode_T, arity, in);
1717 
1718  /* init node attributes */
1719 
1720  /* flags */
1721  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1722  int const n_res = 3;
1723  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1724  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1725  (void)attr; /* avoid potential warning */
1726  x86_insn_size_t size = X86_SIZE_128;
1727 
1728  init_amd64_attributes(res, op_mode, size);
1729  attr->addr = addr;
1730  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1731  out_infos[0].req = &amd64_class_reg_req_xmm;
1732  out_infos[1].req = &arch_no_requirement;
1733  out_infos[2].req = &arch_memory_requirement;
1734 
1735  verify_new_node(res);
1736  return optimize_node(res);
1737 }
1738 
1739 ir_node *new_bd_amd64_movdqu(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, amd64_op_mode_t op_mode, x86_addr_t addr)
1740 {
1741 
1742 
1743  ir_graph *const irg = get_irn_irg(block);
1744  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movdqu, mode_T, arity, in);
1745 
1746  /* init node attributes */
1747 
1748  /* flags */
1749  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1750  int const n_res = 3;
1751  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1752  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1753  (void)attr; /* avoid potential warning */
1754  x86_insn_size_t size = X86_SIZE_128;
1755 
1756  init_amd64_attributes(res, op_mode, size);
1757  attr->addr = addr;
1758  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1759  out_infos[0].req = &amd64_class_reg_req_xmm;
1760  out_infos[1].req = &arch_no_requirement;
1761  out_infos[2].req = &arch_memory_requirement;
1762 
1763  verify_new_node(res);
1764  return optimize_node(res);
1765 }
1766 
1767 ir_node *new_bd_amd64_movdqu_store(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1768 {
1769 
1770 
1771  ir_graph *const irg = get_irn_irg(block);
1772  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movdqu_store, mode_M, arity, in);
1773 
1774  /* init node attributes */
1775 
1776  /* flags */
1777  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1778  int const n_res = 1;
1779  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1780  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1781  (void)attr; /* avoid potential warning */
1782  *attr = *attr_init;
1783  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1784  out_infos[0].req = &arch_memory_requirement;
1785 
1786  verify_new_node(res);
1787  return optimize_node(res);
1788 }
1789 
1790 ir_node *new_bd_amd64_movs(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1791 {
1792 
1793 
1794  ir_graph *const irg = get_irn_irg(block);
1795  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movs, mode_T, arity, in);
1796 
1797  /* init node attributes */
1798 
1799  /* flags */
1800  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1801  int const n_res = 3;
1802  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1803  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1804  (void)attr; /* avoid potential warning */
1805  init_amd64_attributes(res, op_mode, size);
1806  attr->addr = addr;
1807  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1808  out_infos[0].req = &amd64_class_reg_req_gp;
1809  out_infos[1].req = &arch_no_requirement;
1810  out_infos[2].req = &arch_memory_requirement;
1811 
1812  verify_new_node(res);
1813  return optimize_node(res);
1814 }
1815 
1816 ir_node *new_bd_amd64_movs_store_xmm(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1817 {
1818 
1819 
1820  ir_graph *const irg = get_irn_irg(block);
1821  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movs_store_xmm, mode_M, arity, in);
1822 
1823  /* init node attributes */
1824 
1825  /* flags */
1826  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1827  int const n_res = 1;
1828  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1829  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1830  (void)attr; /* avoid potential warning */
1831  *attr = *attr_init;
1832  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1833  out_infos[0].req = &arch_memory_requirement;
1834 
1835  verify_new_node(res);
1836  return optimize_node(res);
1837 }
1838 
1839 ir_node *new_bd_amd64_movs_xmm(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1840 {
1841 
1842 
1843  ir_graph *const irg = get_irn_irg(block);
1844  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movs_xmm, mode_T, arity, in);
1845 
1846  /* init node attributes */
1847 
1848  /* flags */
1849  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1850  int const n_res = 3;
1851  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1852  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1853  (void)attr; /* avoid potential warning */
1854  init_amd64_attributes(res, op_mode, size);
1855  attr->addr = addr;
1856  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1857  out_infos[0].req = &amd64_class_reg_req_xmm;
1858  out_infos[1].req = &arch_no_requirement;
1859  out_infos[2].req = &arch_memory_requirement;
1860 
1861  verify_new_node(res);
1862  return optimize_node(res);
1863 }
1864 
1865 ir_node *new_bd_amd64_mul(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1866 {
1867 
1868 
1869  ir_graph *const irg = get_irn_irg(block);
1870  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_mul, mode_T, arity, in);
1871 
1872  /* init node attributes */
1873 
1874  /* flags */
1875  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1876  irn_flags |= arch_irn_flag_modify_flags;
1877  int const n_res = 4;
1878  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1879  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1880  (void)attr; /* avoid potential warning */
1881  init_amd64_attributes(res, op_mode, size);
1882  attr->addr = addr;
1883  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1884  out_infos[0].req = &amd64_single_reg_req_gp_rax;
1885  out_infos[1].req = &amd64_class_reg_req_flags;
1886  out_infos[2].req = &arch_memory_requirement;
1887  out_infos[3].req = &amd64_single_reg_req_gp_rdx;
1888 
1889  verify_new_node(res);
1890  return optimize_node(res);
1891 }
1892 
1893 ir_node *new_bd_amd64_muls(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1894 {
1895 
1896 
1897  ir_graph *const irg = get_irn_irg(block);
1898  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_muls, mode_T, arity, in);
1899 
1900  /* init node attributes */
1901 
1902  /* flags */
1903  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1904  irn_flags |= arch_irn_flag_rematerializable;
1905  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
1906  int const n_res = 3;
1907  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1908  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1909  (void)attr; /* avoid potential warning */
1910  *attr = *attr_init;
1911  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1912  out_infos[0].req = &amd64_class_reg_req_xmm;
1913  out_infos[1].req = &arch_no_requirement;
1914  out_infos[2].req = &arch_memory_requirement;
1915 
1916  verify_new_node(res);
1917  return optimize_node(res);
1918 }
1919 
1920 ir_node *new_bd_amd64_neg(dbg_info *dbgi, ir_node *block, ir_node *val, x86_insn_size_t size)
1921 {
1922  static arch_register_req_t const *in_reqs[] = {
1923  &amd64_class_reg_req_gp,
1924  };
1925 
1926  /* construct in array */
1927  ir_node *const in[] = {
1928  val,
1929  };
1930 
1931  ir_graph *const irg = get_irn_irg(block);
1932  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_neg, mode_T, 1, in);
1933 
1934  /* init node attributes */
1935 
1936  /* flags */
1937  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1938  irn_flags |= arch_irn_flag_modify_flags;
1939  irn_flags |= arch_irn_flag_rematerializable;
1940  int const n_res = 2;
1941  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1942  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1943  (void)attr; /* avoid potential warning */
1944  amd64_op_mode_t op_mode = AMD64_OP_REG;
1945 x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };
1946  init_amd64_attributes(res, op_mode, size);
1947  attr->addr = addr;
1948  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1949  out_infos[0].req = &amd64_requirements_gp_in_r0;
1950  out_infos[1].req = &amd64_class_reg_req_flags;
1951 
1952  verify_new_node(res);
1953  return optimize_node(res);
1954 }
1955 
1956 ir_node *new_bd_amd64_not(dbg_info *dbgi, ir_node *block, ir_node *val, x86_insn_size_t size)
1957 {
1958  static arch_register_req_t const *in_reqs[] = {
1959  &amd64_class_reg_req_gp,
1960  };
1961 
1962  /* construct in array */
1963  ir_node *const in[] = {
1964  val,
1965  };
1966 
1967  ir_graph *const irg = get_irn_irg(block);
1968  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_not, mode_T, 1, in);
1969 
1970  /* init node attributes */
1971 
1972  /* flags */
1973  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1974  irn_flags |= arch_irn_flag_modify_flags;
1975  irn_flags |= arch_irn_flag_rematerializable;
1976  int const n_res = 2;
1977  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1978  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1979  (void)attr; /* avoid potential warning */
1980  amd64_op_mode_t op_mode = AMD64_OP_REG;
1981 x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };
1982  init_amd64_attributes(res, op_mode, size);
1983  attr->addr = addr;
1984  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1985  out_infos[0].req = &amd64_requirements_gp_in_r0;
1986  out_infos[1].req = &amd64_class_reg_req_flags;
1987 
1988  verify_new_node(res);
1989  return optimize_node(res);
1990 }
1991 
1992 ir_node *new_bd_amd64_or(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1993 {
1994 
1995 
1996  ir_graph *const irg = get_irn_irg(block);
1997  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_or, mode_T, arity, in);
1998 
1999  /* init node attributes */
2000 
2001  /* flags */
2002  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2003  irn_flags |= arch_irn_flag_modify_flags;
2004  irn_flags |= arch_irn_flag_rematerializable;
2005  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
2006  int const n_res = 3;
2007  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2008  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2009  (void)attr; /* avoid potential warning */
2010  *attr = *attr_init;
2011  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2012  out_infos[0].req = &amd64_class_reg_req_gp;
2013  out_infos[1].req = &amd64_class_reg_req_flags;
2014  out_infos[2].req = &arch_memory_requirement;
2015 
2016  verify_new_node(res);
2017  return optimize_node(res);
2018 }
2019 
2020 ir_node *new_bd_amd64_pop_am(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, x86_addr_t addr)
2021 {
2022 
2023 
2024  ir_graph *const irg = get_irn_irg(block);
2025  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_pop_am, mode_T, arity, in);
2026 
2027  /* init node attributes */
2028 
2029  /* flags */
2030  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2031  int const n_res = 2;
2032  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2033  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
2034  (void)attr; /* avoid potential warning */
2035  amd64_op_mode_t op_mode = AMD64_OP_ADDR;
2036 
2037  init_amd64_attributes(res, op_mode, size);
2038  attr->addr = addr;
2039  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2040  out_infos[0].req = &amd64_requirements_gp_rsp_I;
2041  out_infos[1].req = &arch_memory_requirement;
2042 
2043  verify_new_node(res);
2044  return optimize_node(res);
2045 }
2046 
2047 ir_node *new_bd_amd64_punpckldq(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2048 {
2049 
2050 
2051  ir_graph *const irg = get_irn_irg(block);
2052  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_punpckldq, mode_T, arity, in);
2053 
2054  /* init node attributes */
2055 
2056  /* flags */
2057  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2058  irn_flags |= arch_irn_flag_rematerializable;
2059  int const n_res = 3;
2060  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2061  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2062  (void)attr; /* avoid potential warning */
2063  *attr = *attr_init;
2064  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2065  out_infos[0].req = &amd64_class_reg_req_xmm;
2066  out_infos[1].req = &arch_no_requirement;
2067  out_infos[2].req = &arch_memory_requirement;
2068 
2069  verify_new_node(res);
2070  return optimize_node(res);
2071 }
2072 
2073 ir_node *new_bd_amd64_push_am(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, x86_addr_t addr)
2074 {
2075 
2076 
2077  ir_graph *const irg = get_irn_irg(block);
2078  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_push_am, mode_T, arity, in);
2079 
2080  /* init node attributes */
2081 
2082  /* flags */
2083  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2084  int const n_res = 2;
2085  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2086  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
2087  (void)attr; /* avoid potential warning */
2088  amd64_op_mode_t op_mode = AMD64_OP_ADDR;
2089 
2090  init_amd64_attributes(res, op_mode, size);
2091  attr->addr = addr;
2092  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2093  out_infos[0].req = &amd64_requirements_gp_rsp_I;
2094  out_infos[1].req = &arch_memory_requirement;
2095 
2096  verify_new_node(res);
2097  return optimize_node(res);
2098 }
2099 
2100 ir_node *new_bd_amd64_push_reg(dbg_info *dbgi, ir_node *block, ir_node *stack, ir_node *mem, ir_node *val, x86_insn_size_t size)
2101 {
2102  static arch_register_req_t const *in_reqs[] = {
2103  &amd64_single_reg_req_gp_rsp,
2104  &arch_memory_requirement,
2105  &amd64_class_reg_req_gp,
2106  };
2107 
2108  /* construct in array */
2109  ir_node *const in[] = {
2110  stack,
2111  mem,
2112  val,
2113  };
2114 
2115  ir_graph *const irg = get_irn_irg(block);
2116  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_push_reg, mode_T, 3, in);
2117 
2118  /* init node attributes */
2119 
2120  /* flags */
2121  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2122  int const n_res = 2;
2123  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2124  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
2125  (void)attr; /* avoid potential warning */
2126  amd64_op_mode_t op_mode = AMD64_OP_NONE;
2127 
2128  init_amd64_attributes(res, op_mode, size);
2129  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2130  out_infos[0].req = &amd64_requirements_gp_rsp_I;
2131  out_infos[1].req = &arch_memory_requirement;
2132 
2133  verify_new_node(res);
2134  return optimize_node(res);
2135 }
2136 
2137 ir_node *new_bd_amd64_ret(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs)
2138 {
2139 
2140 
2141  ir_graph *const irg = get_irn_irg(block);
2142  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_ret, mode_X, arity, in);
2143 
2144  /* init node attributes */
2145 
2146  /* flags */
2147  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2148  int const n_res = 1;
2149  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2150  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
2151  (void)attr; /* avoid potential warning */
2152  amd64_op_mode_t op_mode = AMD64_OP_NONE;
2153 x86_insn_size_t size = X86_SIZE_64;
2154 
2155  init_amd64_attributes(res, op_mode, size);
2156  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2157  out_infos[0].req = &arch_exec_requirement;
2158 
2159  verify_new_node(res);
2160  return optimize_node(res);
2161 }
2162 
2163 ir_node *new_bd_amd64_sar(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_shift_attr_t *attr_init)
2164 {
2165 
2166 
2167  ir_graph *const irg = get_irn_irg(block);
2168  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_sar, mode_T, arity, in);
2169 
2170  /* init node attributes */
2171 
2172  /* flags */
2173  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2174  irn_flags |= arch_irn_flag_modify_flags;
2175  irn_flags |= arch_irn_flag_rematerializable;
2176  int const n_res = 2;
2177  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2178  amd64_shift_attr_t *const attr = (amd64_shift_attr_t*)get_irn_generic_attr(res);
2179  (void)attr; /* avoid potential warning */
2180  *attr = *attr_init;
2181 
2182  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2183  out_infos[0].req = &amd64_class_reg_req_gp;
2184  out_infos[1].req = &amd64_class_reg_req_flags;
2185 
2186  verify_new_node(res);
2187  return optimize_node(res);
2188 }
2189 
2190 ir_node *new_bd_amd64_sbb(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2191 {
2192 
2193 
2194  ir_graph *const irg = get_irn_irg(block);
2195  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_sbb, mode_T, arity, in);
2196 
2197  /* init node attributes */
2198 
2199  /* flags */
2200  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2201  irn_flags |= arch_irn_flag_modify_flags;
2202  int const n_res = 3;
2203  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2204  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2205  (void)attr; /* avoid potential warning */
2206  *attr = *attr_init;
2207  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2208  out_infos[0].req = &amd64_class_reg_req_gp;
2209  out_infos[1].req = &amd64_class_reg_req_flags;
2210  out_infos[2].req = &arch_memory_requirement;
2211 
2212  verify_new_node(res);
2213  return optimize_node(res);
2214 }
2215 
2216 ir_node *new_bd_amd64_setcc(dbg_info *dbgi, ir_node *block, ir_node *flags, x86_condition_code_t cc)
2217 {
2218  static arch_register_req_t const *in_reqs[] = {
2219  &amd64_class_reg_req_flags,
2220  };
2221 
2222  /* construct in array */
2223  ir_node *const in[] = {
2224  flags,
2225  };
2226 
2227  ir_graph *const irg = get_irn_irg(block);
2228  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_setcc, mode_Lu, 1, in);
2229 
2230  /* init node attributes */
2231 
2232  /* flags */
2233  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2234  int const n_res = 1;
2235  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2236  amd64_cc_attr_t *const attr = (amd64_cc_attr_t*)get_irn_generic_attr(res);
2237  (void)attr; /* avoid potential warning */
2238  x86_insn_size_t size = X86_SIZE_8;
2239  init_amd64_attributes(res, AMD64_OP_CC, size);
2240  init_amd64_cc_attributes(res, cc);
2241  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2242  out_infos[0].req = &amd64_class_reg_req_gp;
2243 
2244  verify_new_node(res);
2245  return optimize_node(res);
2246 }
2247 
2248 ir_node *new_bd_amd64_shl(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_shift_attr_t *attr_init)
2249 {
2250 
2251 
2252  ir_graph *const irg = get_irn_irg(block);
2253  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_shl, mode_T, arity, in);
2254 
2255  /* init node attributes */
2256 
2257  /* flags */
2258  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2259  irn_flags |= arch_irn_flag_modify_flags;
2260  irn_flags |= arch_irn_flag_rematerializable;
2261  int const n_res = 2;
2262  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2263  amd64_shift_attr_t *const attr = (amd64_shift_attr_t*)get_irn_generic_attr(res);
2264  (void)attr; /* avoid potential warning */
2265  *attr = *attr_init;
2266 
2267  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2268  out_infos[0].req = &amd64_class_reg_req_gp;
2269  out_infos[1].req = &amd64_class_reg_req_flags;
2270 
2271  verify_new_node(res);
2272  return optimize_node(res);
2273 }
2274 
2275 ir_node *new_bd_amd64_shr(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_shift_attr_t *attr_init)
2276 {
2277 
2278 
2279  ir_graph *const irg = get_irn_irg(block);
2280  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_shr, mode_T, arity, in);
2281 
2282  /* init node attributes */
2283 
2284  /* flags */
2285  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2286  irn_flags |= arch_irn_flag_modify_flags;
2287  irn_flags |= arch_irn_flag_rematerializable;
2288  int const n_res = 2;
2289  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2290  amd64_shift_attr_t *const attr = (amd64_shift_attr_t*)get_irn_generic_attr(res);
2291  (void)attr; /* avoid potential warning */
2292  *attr = *attr_init;
2293 
2294  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2295  out_infos[0].req = &amd64_class_reg_req_gp;
2296  out_infos[1].req = &amd64_class_reg_req_flags;
2297 
2298  verify_new_node(res);
2299  return optimize_node(res);
2300 }
2301 
2302 ir_node *new_bd_amd64_sub(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2303 {
2304 
2305 
2306  ir_graph *const irg = get_irn_irg(block);
2307  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_sub, mode_T, arity, in);
2308 
2309  /* init node attributes */
2310 
2311  /* flags */
2312  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2313  irn_flags |= arch_irn_flag_modify_flags;
2314  irn_flags |= arch_irn_flag_rematerializable;
2315  int const n_res = 3;
2316  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2317  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2318  (void)attr; /* avoid potential warning */
2319  *attr = *attr_init;
2320  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2321  out_infos[0].req = &amd64_class_reg_req_gp;
2322  out_infos[1].req = &amd64_class_reg_req_flags;
2323  out_infos[2].req = &arch_memory_requirement;
2324 
2325  verify_new_node(res);
2326  return optimize_node(res);
2327 }
2328 
2329 ir_node *new_bd_amd64_sub_sp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2330 {
2331 
2332 
2333  ir_graph *const irg = get_irn_irg(block);
2334  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_sub_sp, mode_T, arity, in);
2335 
2336  /* init node attributes */
2337 
2338  /* flags */
2339  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2340  irn_flags |= arch_irn_flag_modify_flags;
2341  int const n_res = 3;
2342  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2343  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2344  (void)attr; /* avoid potential warning */
2345  *attr = *attr_init;
2346  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2347  out_infos[0].req = &amd64_requirements_gp_rsp_I;
2348  out_infos[1].req = &amd64_class_reg_req_gp;
2349  out_infos[2].req = &arch_memory_requirement;
2350 
2351  verify_new_node(res);
2352  return optimize_node(res);
2353 }
2354 
2355 ir_node *new_bd_amd64_subpd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2356 {
2357 
2358 
2359  ir_graph *const irg = get_irn_irg(block);
2360  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_subpd, mode_T, arity, in);
2361 
2362  /* init node attributes */
2363 
2364  /* flags */
2365  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2366  irn_flags |= arch_irn_flag_rematerializable;
2367  int const n_res = 3;
2368  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2369  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2370  (void)attr; /* avoid potential warning */
2371  *attr = *attr_init;
2372  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2373  out_infos[0].req = &amd64_class_reg_req_xmm;
2374  out_infos[1].req = &arch_no_requirement;
2375  out_infos[2].req = &arch_memory_requirement;
2376 
2377  verify_new_node(res);
2378  return optimize_node(res);
2379 }
2380 
2381 ir_node *new_bd_amd64_subs(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2382 {
2383 
2384 
2385  ir_graph *const irg = get_irn_irg(block);
2386  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_subs, mode_T, arity, in);
2387 
2388  /* init node attributes */
2389 
2390  /* flags */
2391  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2392  irn_flags |= arch_irn_flag_rematerializable;
2393  int const n_res = 3;
2394  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2395  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2396  (void)attr; /* avoid potential warning */
2397  *attr = *attr_init;
2398  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2399  out_infos[0].req = &amd64_class_reg_req_xmm;
2400  out_infos[1].req = &arch_no_requirement;
2401  out_infos[2].req = &arch_memory_requirement;
2402 
2403  verify_new_node(res);
2404  return optimize_node(res);
2405 }
2406 
2407 ir_node *new_bd_amd64_test(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2408 {
2409 
2410 
2411  ir_graph *const irg = get_irn_irg(block);
2412  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_test, mode_T, arity, in);
2413 
2414  /* init node attributes */
2415 
2416  /* flags */
2417  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2418  irn_flags |= arch_irn_flag_modify_flags;
2419  irn_flags |= arch_irn_flag_rematerializable;
2420  int const n_res = 3;
2421  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2422  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2423  (void)attr; /* avoid potential warning */
2424  *attr = *attr_init;
2425  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2426  out_infos[0].req = &arch_no_requirement;
2427  out_infos[1].req = &amd64_class_reg_req_flags;
2428  out_infos[2].req = &arch_memory_requirement;
2429 
2430  verify_new_node(res);
2431  return optimize_node(res);
2432 }
2433 
2434 ir_node *new_bd_amd64_ucomis(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2435 {
2436 
2437 
2438  ir_graph *const irg = get_irn_irg(block);
2439  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_ucomis, mode_T, arity, in);
2440 
2441  /* init node attributes */
2442 
2443  /* flags */
2444  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2445  irn_flags |= arch_irn_flag_modify_flags;
2446  irn_flags |= arch_irn_flag_rematerializable;
2447  int const n_res = 3;
2448  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2449  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2450  (void)attr; /* avoid potential warning */
2451  *attr = *attr_init;
2452  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2453  out_infos[0].req = &arch_no_requirement;
2454  out_infos[1].req = &amd64_class_reg_req_flags;
2455  out_infos[2].req = &arch_memory_requirement;
2456 
2457  verify_new_node(res);
2458  return optimize_node(res);
2459 }
2460 
2461 ir_node *new_bd_amd64_xor(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2462 {
2463 
2464 
2465  ir_graph *const irg = get_irn_irg(block);
2466  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_xor, mode_T, arity, in);
2467 
2468  /* init node attributes */
2469 
2470  /* flags */
2471  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2472  irn_flags |= arch_irn_flag_modify_flags;
2473  irn_flags |= arch_irn_flag_rematerializable;
2474  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
2475  int const n_res = 3;
2476  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2477  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2478  (void)attr; /* avoid potential warning */
2479  *attr = *attr_init;
2480  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2481  out_infos[0].req = &amd64_class_reg_req_gp;
2482  out_infos[1].req = &amd64_class_reg_req_flags;
2483  out_infos[2].req = &arch_memory_requirement;
2484 
2485  verify_new_node(res);
2486  return optimize_node(res);
2487 }
2488 
2489 ir_node *new_bd_amd64_xor_0(dbg_info *dbgi, ir_node *block, x86_insn_size_t size)
2490 {
2491  arch_register_req_t const **const in_reqs = NULL;
2492 
2493 
2494  ir_graph *const irg = get_irn_irg(block);
2495  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_xor_0, mode_T, 0, NULL);
2496 
2497  /* init node attributes */
2498 
2499  /* flags */
2500  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2501  irn_flags |= arch_irn_flag_modify_flags;
2502  irn_flags |= arch_irn_flag_rematerializable;
2503  int const n_res = 2;
2504  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2505  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
2506  (void)attr; /* avoid potential warning */
2507  amd64_op_mode_t op_mode = AMD64_OP_NONE;
2508  init_amd64_attributes(res, op_mode, size);
2509  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2510  out_infos[0].req = &amd64_class_reg_req_gp;
2511  out_infos[1].req = &amd64_class_reg_req_flags;
2512 
2513  verify_new_node(res);
2514  return optimize_node(res);
2515 }
2516 
2517 ir_node *new_bd_amd64_xorp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2518 {
2519 
2520 
2521  ir_graph *const irg = get_irn_irg(block);
2522  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_xorp, mode_T, arity, in);
2523 
2524  /* init node attributes */
2525 
2526  /* flags */
2527  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2528  irn_flags |= arch_irn_flag_rematerializable;
2529  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
2530  int const n_res = 3;
2531  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2532  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2533  (void)attr; /* avoid potential warning */
2534  *attr = *attr_init;
2535  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2536  out_infos[0].req = &amd64_class_reg_req_xmm;
2537  out_infos[1].req = &arch_no_requirement;
2538  out_infos[2].req = &arch_memory_requirement;
2539 
2540  verify_new_node(res);
2541  return optimize_node(res);
2542 }
2543 
2544 ir_node *new_bd_amd64_xorp_0(dbg_info *dbgi, ir_node *block, x86_insn_size_t size)
2545 {
2546  arch_register_req_t const **const in_reqs = NULL;
2547 
2548 
2549  ir_graph *const irg = get_irn_irg(block);
2550  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_xorp_0, amd64_mode_xmm, 0, NULL);
2551 
2552  /* init node attributes */
2553 
2554  /* flags */
2555  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2556  irn_flags |= arch_irn_flag_rematerializable;
2557  int const n_res = 1;
2558  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2559  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
2560  (void)attr; /* avoid potential warning */
2561  amd64_op_mode_t op_mode = AMD64_OP_NONE;
2562  init_amd64_attributes(res, op_mode, size);
2563  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2564  out_infos[0].req = &amd64_class_reg_req_xmm;
2565 
2566  verify_new_node(res);
2567  return optimize_node(res);
2568 }
2569 
2570 
2575 void amd64_create_opcodes(void)
2576 {
2577  ir_op *op;
2578  int cur_opcode = get_next_ir_opcodes(iro_amd64_last);
2579 
2580  amd64_opcode_start = cur_opcode;
2581  op = new_ir_op(cur_opcode + iro_amd64_add, "amd64_add", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2582  set_op_dump(op, amd64_dump_node);
2583  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2584  set_op_copy_attr(op, be_copy_attr);
2585  set_op_tag(op, amd64_op_tag);
2586  op_amd64_add = op;
2587  op = new_ir_op(cur_opcode + iro_amd64_adds, "amd64_adds", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2588  set_op_dump(op, amd64_dump_node);
2589  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2590  set_op_copy_attr(op, be_copy_attr);
2591  set_op_tag(op, amd64_op_tag);
2592  op_amd64_adds = op;
2593  op = new_ir_op(cur_opcode + iro_amd64_and, "amd64_and", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2594  set_op_dump(op, amd64_dump_node);
2595  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2596  set_op_copy_attr(op, be_copy_attr);
2597  set_op_tag(op, amd64_op_tag);
2598  op_amd64_and = op;
2599  op = new_ir_op(cur_opcode + iro_amd64_bsf, "amd64_bsf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2600  set_op_dump(op, amd64_dump_node);
2601  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2602  set_op_copy_attr(op, be_copy_attr);
2603  set_op_tag(op, amd64_op_tag);
2604  op_amd64_bsf = op;
2605  op = new_ir_op(cur_opcode + iro_amd64_bsr, "amd64_bsr", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2606  set_op_dump(op, amd64_dump_node);
2607  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2608  set_op_copy_attr(op, be_copy_attr);
2609  set_op_tag(op, amd64_op_tag);
2610  op_amd64_bsr = op;
2611  op = new_ir_op(cur_opcode + iro_amd64_call, "amd64_call", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_call_addr_attr_t));
2612  set_op_dump(op, amd64_dump_node);
2613  set_op_attrs_equal(op, amd64_call_addr_attrs_equal);
2614  set_op_copy_attr(op, be_copy_attr);
2615  set_op_tag(op, amd64_op_tag);
2616  op_amd64_call = op;
2617  op = new_ir_op(cur_opcode + iro_amd64_cltd, "amd64_cltd", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_attr_t));
2618  set_op_dump(op, amd64_dump_node);
2619  set_op_attrs_equal(op, amd64_attrs_equal);
2620  set_op_copy_attr(op, be_copy_attr);
2621  set_op_tag(op, amd64_op_tag);
2622  op_amd64_cltd = op;
2623  op = new_ir_op(cur_opcode + iro_amd64_cmp, "amd64_cmp", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2624  set_op_dump(op, amd64_dump_node);
2625  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2626  set_op_copy_attr(op, be_copy_attr);
2627  set_op_tag(op, amd64_op_tag);
2628  op_amd64_cmp = op;
2629  op = new_ir_op(cur_opcode + iro_amd64_cmpxchg, "amd64_cmpxchg", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2630  set_op_dump(op, amd64_dump_node);
2631  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2632  set_op_copy_attr(op, be_copy_attr);
2633  set_op_tag(op, amd64_op_tag);
2634  op_amd64_cmpxchg = op;
2635  op = new_ir_op(cur_opcode + iro_amd64_copyB, "amd64_copyB", op_pin_state_floats, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_copyb_attr_t));
2636  ir_op_set_memory_index(op, 3); set_op_dump(op, amd64_dump_node);
2637  set_op_attrs_equal(op, amd64_copyb_attrs_equal);
2638  set_op_copy_attr(op, be_copy_attr);
2639  set_op_tag(op, amd64_op_tag);
2640  op_amd64_copyB = op;
2641  op = new_ir_op(cur_opcode + iro_amd64_copyB_i, "amd64_copyB_i", op_pin_state_floats, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_copyb_attr_t));
2642  ir_op_set_memory_index(op, 2); set_op_dump(op, amd64_dump_node);
2643  set_op_attrs_equal(op, amd64_copyb_attrs_equal);
2644  set_op_copy_attr(op, be_copy_attr);
2645  set_op_tag(op, amd64_op_tag);
2646  op_amd64_copyB_i = op;
2647  op = new_ir_op(cur_opcode + iro_amd64_cqto, "amd64_cqto", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_attr_t));
2648  set_op_dump(op, amd64_dump_node);
2649  set_op_attrs_equal(op, amd64_attrs_equal);
2650  set_op_copy_attr(op, be_copy_attr);
2651  set_op_tag(op, amd64_op_tag);
2652  op_amd64_cqto = op;
2653  op = new_ir_op(cur_opcode + iro_amd64_cvtsd2ss, "amd64_cvtsd2ss", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2654  set_op_dump(op, amd64_dump_node);
2655  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2656  set_op_copy_attr(op, be_copy_attr);
2657  set_op_tag(op, amd64_op_tag);
2658  op_amd64_cvtsd2ss = op;
2659  op = new_ir_op(cur_opcode + iro_amd64_cvtsi2sd, "amd64_cvtsi2sd", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2660  set_op_dump(op, amd64_dump_node);
2661  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2662  set_op_copy_attr(op, be_copy_attr);
2663  set_op_tag(op, amd64_op_tag);
2664  op_amd64_cvtsi2sd = op;
2665  op = new_ir_op(cur_opcode + iro_amd64_cvtsi2ss, "amd64_cvtsi2ss", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2666  set_op_dump(op, amd64_dump_node);
2667  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2668  set_op_copy_attr(op, be_copy_attr);
2669  set_op_tag(op, amd64_op_tag);
2670  op_amd64_cvtsi2ss = op;
2671  op = new_ir_op(cur_opcode + iro_amd64_cvtss2sd, "amd64_cvtss2sd", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2672  set_op_dump(op, amd64_dump_node);
2673  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2674  set_op_copy_attr(op, be_copy_attr);
2675  set_op_tag(op, amd64_op_tag);
2676  op_amd64_cvtss2sd = op;
2677  op = new_ir_op(cur_opcode + iro_amd64_cvttsd2si, "amd64_cvttsd2si", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2678  set_op_dump(op, amd64_dump_node);
2679  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2680  set_op_copy_attr(op, be_copy_attr);
2681  set_op_tag(op, amd64_op_tag);
2682  op_amd64_cvttsd2si = op;
2683  op = new_ir_op(cur_opcode + iro_amd64_cvttss2si, "amd64_cvttss2si", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2684  set_op_dump(op, amd64_dump_node);
2685  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2686  set_op_copy_attr(op, be_copy_attr);
2687  set_op_tag(op, amd64_op_tag);
2688  op_amd64_cvttss2si = op;
2689  op = new_ir_op(cur_opcode + iro_amd64_div, "amd64_div", op_pin_state_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2690  set_op_dump(op, amd64_dump_node);
2691  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2692  set_op_copy_attr(op, be_copy_attr);
2693  set_op_tag(op, amd64_op_tag);
2694  op_amd64_div = op;
2695  op = new_ir_op(cur_opcode + iro_amd64_divs, "amd64_divs", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2696  set_op_dump(op, amd64_dump_node);
2697  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2698  set_op_copy_attr(op, be_copy_attr);
2699  set_op_tag(op, amd64_op_tag);
2700  op_amd64_divs = op;
2701  op = new_ir_op(cur_opcode + iro_amd64_fadd, "amd64_fadd", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2702  set_op_dump(op, amd64_dump_node);
2703  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2704  set_op_copy_attr(op, be_copy_attr);
2705  set_op_tag(op, amd64_op_tag);
2706  op_amd64_fadd = op;
2707  op = new_ir_op(cur_opcode + iro_amd64_fchs, "amd64_fchs", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2708  set_op_dump(op, amd64_dump_node);
2709  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2710  set_op_copy_attr(op, be_copy_attr);
2711  set_op_tag(op, amd64_op_tag);
2712  op_amd64_fchs = op;
2713  op = new_ir_op(cur_opcode + iro_amd64_fdiv, "amd64_fdiv", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2714  set_op_dump(op, amd64_dump_node);
2715  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2716  set_op_copy_attr(op, be_copy_attr);
2717  set_op_tag(op, amd64_op_tag);
2718  op_amd64_fdiv = op;
2719  op = new_ir_op(cur_opcode + iro_amd64_fdup, "amd64_fdup", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2720  set_op_dump(op, amd64_dump_node);
2721  set_op_attrs_equal(op, attrs_equal_false);
2722  set_op_copy_attr(op, be_copy_attr);
2723  set_op_tag(op, amd64_op_tag);
2724  op_amd64_fdup = op;
2725  op = new_ir_op(cur_opcode + iro_amd64_fild, "amd64_fild", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_x87_addr_attr_t));
2726  set_op_dump(op, amd64_dump_node);
2727  set_op_attrs_equal(op, amd64_x87_addr_attrs_equal);
2728  set_op_copy_attr(op, be_copy_attr);
2729  set_op_tag(op, amd64_op_tag);
2730  op_amd64_fild = op;
2731  op = new_ir_op(cur_opcode + iro_amd64_fisttp, "amd64_fisttp", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_x87_binop_addr_attr_t));
2732  set_op_dump(op, amd64_dump_node);
2733  set_op_attrs_equal(op, amd64_x87_binop_addr_attrs_equal);
2734  set_op_copy_attr(op, be_copy_attr);
2735  set_op_tag(op, amd64_op_tag);
2736  op_amd64_fisttp = op;
2737  op = new_ir_op(cur_opcode + iro_amd64_fld, "amd64_fld", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_x87_addr_attr_t));
2738  set_op_dump(op, amd64_dump_node);
2739  set_op_attrs_equal(op, amd64_x87_addr_attrs_equal);
2740  set_op_copy_attr(op, be_copy_attr);
2741  set_op_tag(op, amd64_op_tag);
2742  op_amd64_fld = op;
2743  op = new_ir_op(cur_opcode + iro_amd64_fld1, "amd64_fld1", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_attr_t));
2744  set_op_dump(op, amd64_dump_node);
2745  set_op_attrs_equal(op, amd64_attrs_equal);
2746  set_op_copy_attr(op, be_copy_attr);
2747  set_op_tag(op, amd64_op_tag);
2748  op_amd64_fld1 = op;
2749  op = new_ir_op(cur_opcode + iro_amd64_fldz, "amd64_fldz", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_attr_t));
2750  set_op_dump(op, amd64_dump_node);
2751  set_op_attrs_equal(op, amd64_attrs_equal);
2752  set_op_copy_attr(op, be_copy_attr);
2753  set_op_tag(op, amd64_op_tag);
2754  op_amd64_fldz = op;
2755  op = new_ir_op(cur_opcode + iro_amd64_fmul, "amd64_fmul", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2756  set_op_dump(op, amd64_dump_node);
2757  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2758  set_op_copy_attr(op, be_copy_attr);
2759  set_op_tag(op, amd64_op_tag);
2760  op_amd64_fmul = op;
2761  op = new_ir_op(cur_opcode + iro_amd64_fpop, "amd64_fpop", op_pin_state_floats, irop_flag_keep, oparity_any, -1, sizeof(amd64_x87_attr_t));
2762  set_op_dump(op, amd64_dump_node);
2763  set_op_attrs_equal(op, attrs_equal_false);
2764  set_op_copy_attr(op, be_copy_attr);
2765  set_op_tag(op, amd64_op_tag);
2766  op_amd64_fpop = op;
2767  op = new_ir_op(cur_opcode + iro_amd64_fst, "amd64_fst", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_x87_binop_addr_attr_t));
2768  set_op_dump(op, amd64_dump_node);
2769  set_op_attrs_equal(op, amd64_x87_binop_addr_attrs_equal);
2770  set_op_copy_attr(op, be_copy_attr);
2771  set_op_tag(op, amd64_op_tag);
2772  op_amd64_fst = op;
2773  op = new_ir_op(cur_opcode + iro_amd64_fstp, "amd64_fstp", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_x87_binop_addr_attr_t));
2774  set_op_dump(op, amd64_dump_node);
2775  set_op_attrs_equal(op, amd64_x87_binop_addr_attrs_equal);
2776  set_op_copy_attr(op, be_copy_attr);
2777  set_op_tag(op, amd64_op_tag);
2778  op_amd64_fstp = op;
2779  op = new_ir_op(cur_opcode + iro_amd64_fsub, "amd64_fsub", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2780  set_op_dump(op, amd64_dump_node);
2781  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2782  set_op_copy_attr(op, be_copy_attr);
2783  set_op_tag(op, amd64_op_tag);
2784  op_amd64_fsub = op;
2785  op = new_ir_op(cur_opcode + iro_amd64_fucomi, "amd64_fucomi", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2786  set_op_dump(op, amd64_dump_node);
2787  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2788  set_op_copy_attr(op, be_copy_attr);
2789  set_op_tag(op, amd64_op_tag);
2790  op_amd64_fucomi = op;
2791  op = new_ir_op(cur_opcode + iro_amd64_fxch, "amd64_fxch", op_pin_state_floats, irop_flag_keep, oparity_any, -1, sizeof(amd64_x87_attr_t));
2792  set_op_dump(op, amd64_dump_node);
2793  set_op_attrs_equal(op, attrs_equal_false);
2794  set_op_copy_attr(op, be_copy_attr);
2795  set_op_tag(op, amd64_op_tag);
2796  op_amd64_fxch = op;
2797  op = new_ir_op(cur_opcode + iro_amd64_haddpd, "amd64_haddpd", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2798  set_op_dump(op, amd64_dump_node);
2799  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2800  set_op_copy_attr(op, be_copy_attr);
2801  set_op_tag(op, amd64_op_tag);
2802  op_amd64_haddpd = op;
2803  op = new_ir_op(cur_opcode + iro_amd64_idiv, "amd64_idiv", op_pin_state_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2804  set_op_dump(op, amd64_dump_node);
2805  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2806  set_op_copy_attr(op, be_copy_attr);
2807  set_op_tag(op, amd64_op_tag);
2808  op_amd64_idiv = op;
2809  op = new_ir_op(cur_opcode + iro_amd64_ijmp, "amd64_ijmp", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_unknown_jump, oparity_any, -1, sizeof(amd64_addr_attr_t));
2810  set_op_dump(op, amd64_dump_node);
2811  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2812  set_op_copy_attr(op, be_copy_attr);
2813  set_op_tag(op, amd64_op_tag);
2814  op_amd64_ijmp = op;
2815  op = new_ir_op(cur_opcode + iro_amd64_imul, "amd64_imul", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2816  set_op_dump(op, amd64_dump_node);
2817  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2818  set_op_copy_attr(op, be_copy_attr);
2819  set_op_tag(op, amd64_op_tag);
2820  op_amd64_imul = op;
2821  op = new_ir_op(cur_opcode + iro_amd64_imul_1op, "amd64_imul_1op", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2822  set_op_dump(op, amd64_dump_node);
2823  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2824  set_op_copy_attr(op, be_copy_attr);
2825  set_op_tag(op, amd64_op_tag);
2826  op_amd64_imul_1op = op;
2827  op = new_ir_op(cur_opcode + iro_amd64_jcc, "amd64_jcc", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(amd64_cc_attr_t));
2828  set_op_dump(op, amd64_dump_node);
2829  set_op_attrs_equal(op, amd64_cc_attrs_equal);
2830  set_op_copy_attr(op, be_copy_attr);
2831  set_op_tag(op, amd64_op_tag);
2832  op_amd64_jcc = op;
2833  op = new_ir_op(cur_opcode + iro_amd64_jmp, "amd64_jmp", op_pin_state_pinned, irop_flag_cfopcode, oparity_any, -1, sizeof(amd64_attr_t));
2834  set_op_dump(op, amd64_dump_node);
2835  set_op_attrs_equal(op, amd64_attrs_equal);
2836  set_op_copy_attr(op, be_copy_attr);
2837  set_op_tag(op, amd64_op_tag);
2838  op_amd64_jmp = op;
2839  op = new_ir_op(cur_opcode + iro_amd64_jmp_switch, "amd64_jmp_switch", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(amd64_switch_jmp_attr_t));
2840  set_op_dump(op, amd64_dump_node);
2841  set_op_attrs_equal(op, amd64_switch_jmp_attrs_equal);
2842  set_op_copy_attr(op, be_copy_attr);
2843  set_op_tag(op, amd64_op_tag);
2844  op_amd64_jmp_switch = op;
2845  op = new_ir_op(cur_opcode + iro_amd64_l_haddpd, "amd64_l_haddpd", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
2846  set_op_dump(op, NULL);
2847  set_op_tag(op, amd64_op_tag);
2848  op_amd64_l_haddpd = op;
2849  op = new_ir_op(cur_opcode + iro_amd64_l_punpckldq, "amd64_l_punpckldq", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
2850  set_op_dump(op, NULL);
2851  set_op_tag(op, amd64_op_tag);
2852  op_amd64_l_punpckldq = op;
2853  op = new_ir_op(cur_opcode + iro_amd64_l_subpd, "amd64_l_subpd", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
2854  set_op_dump(op, NULL);
2855  set_op_tag(op, amd64_op_tag);
2856  op_amd64_l_subpd = op;
2857  op = new_ir_op(cur_opcode + iro_amd64_lea, "amd64_lea", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2858  set_op_dump(op, amd64_dump_node);
2859  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2860  set_op_copy_attr(op, be_copy_attr);
2861  set_op_tag(op, amd64_op_tag);
2862  op_amd64_lea = op;
2863  op = new_ir_op(cur_opcode + iro_amd64_leave, "amd64_leave", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_attr_t));
2864  ir_op_set_memory_index(op, 1); set_op_dump(op, amd64_dump_node);
2865  set_op_attrs_equal(op, amd64_attrs_equal);
2866  set_op_copy_attr(op, be_copy_attr);
2867  set_op_tag(op, amd64_op_tag);
2868  op_amd64_leave = op;
2869  op = new_ir_op(cur_opcode + iro_amd64_mov_gp, "amd64_mov_gp", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2870  set_op_dump(op, amd64_dump_node);
2871  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2872  set_op_copy_attr(op, be_copy_attr);
2873  set_op_tag(op, amd64_op_tag);
2874  op_amd64_mov_gp = op;
2875  op = new_ir_op(cur_opcode + iro_amd64_mov_imm, "amd64_mov_imm", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_movimm_attr_t));
2876  set_op_dump(op, amd64_dump_node);
2877  set_op_attrs_equal(op, amd64_movimm_attrs_equal);
2878  set_op_copy_attr(op, be_copy_attr);
2879  set_op_tag(op, amd64_op_tag);
2880  op_amd64_mov_imm = op;
2881  op = new_ir_op(cur_opcode + iro_amd64_mov_store, "amd64_mov_store", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2882  set_op_dump(op, amd64_dump_node);
2883  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2884  set_op_copy_attr(op, be_copy_attr);
2885  set_op_tag(op, amd64_op_tag);
2886  op_amd64_mov_store = op;
2887  op = new_ir_op(cur_opcode + iro_amd64_movd, "amd64_movd", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2888  set_op_dump(op, amd64_dump_node);
2889  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2890  set_op_copy_attr(op, be_copy_attr);
2891  set_op_tag(op, amd64_op_tag);
2892  op_amd64_movd = op;
2893  op = new_ir_op(cur_opcode + iro_amd64_movd_gp_xmm, "amd64_movd_gp_xmm", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2894  set_op_dump(op, amd64_dump_node);
2895  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2896  set_op_copy_attr(op, be_copy_attr);
2897  set_op_tag(op, amd64_op_tag);
2898  op_amd64_movd_gp_xmm = op;
2899  op = new_ir_op(cur_opcode + iro_amd64_movd_xmm_gp, "amd64_movd_xmm_gp", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2900  set_op_dump(op, amd64_dump_node);
2901  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2902  set_op_copy_attr(op, be_copy_attr);
2903  set_op_tag(op, amd64_op_tag);
2904  op_amd64_movd_xmm_gp = op;
2905  op = new_ir_op(cur_opcode + iro_amd64_movdqa, "amd64_movdqa", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2906  set_op_dump(op, amd64_dump_node);
2907  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2908  set_op_copy_attr(op, be_copy_attr);
2909  set_op_tag(op, amd64_op_tag);
2910  op_amd64_movdqa = op;
2911  op = new_ir_op(cur_opcode + iro_amd64_movdqu, "amd64_movdqu", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2912  set_op_dump(op, amd64_dump_node);
2913  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2914  set_op_copy_attr(op, be_copy_attr);
2915  set_op_tag(op, amd64_op_tag);
2916  op_amd64_movdqu = op;
2917  op = new_ir_op(cur_opcode + iro_amd64_movdqu_store, "amd64_movdqu_store", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2918  set_op_dump(op, amd64_dump_node);
2919  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2920  set_op_copy_attr(op, be_copy_attr);
2921  set_op_tag(op, amd64_op_tag);
2922  op_amd64_movdqu_store = op;
2923  op = new_ir_op(cur_opcode + iro_amd64_movs, "amd64_movs", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2924  set_op_dump(op, amd64_dump_node);
2925  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2926  set_op_copy_attr(op, be_copy_attr);
2927  set_op_tag(op, amd64_op_tag);
2928  op_amd64_movs = op;
2929  op = new_ir_op(cur_opcode + iro_amd64_movs_store_xmm, "amd64_movs_store_xmm", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2930  set_op_dump(op, amd64_dump_node);
2931  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2932  set_op_copy_attr(op, be_copy_attr);
2933  set_op_tag(op, amd64_op_tag);
2934  op_amd64_movs_store_xmm = op;
2935  op = new_ir_op(cur_opcode + iro_amd64_movs_xmm, "amd64_movs_xmm", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2936  set_op_dump(op, amd64_dump_node);
2937  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2938  set_op_copy_attr(op, be_copy_attr);
2939  set_op_tag(op, amd64_op_tag);
2940  op_amd64_movs_xmm = op;
2941  op = new_ir_op(cur_opcode + iro_amd64_mul, "amd64_mul", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2942  set_op_dump(op, amd64_dump_node);
2943  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2944  set_op_copy_attr(op, be_copy_attr);
2945  set_op_tag(op, amd64_op_tag);
2946  op_amd64_mul = op;
2947  op = new_ir_op(cur_opcode + iro_amd64_muls, "amd64_muls", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2948  set_op_dump(op, amd64_dump_node);
2949  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2950  set_op_copy_attr(op, be_copy_attr);
2951  set_op_tag(op, amd64_op_tag);
2952  op_amd64_muls = op;
2953  op = new_ir_op(cur_opcode + iro_amd64_neg, "amd64_neg", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2954  set_op_dump(op, amd64_dump_node);
2955  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2956  set_op_copy_attr(op, be_copy_attr);
2957  set_op_tag(op, amd64_op_tag);
2958  op_amd64_neg = op;
2959  op = new_ir_op(cur_opcode + iro_amd64_not, "amd64_not", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2960  set_op_dump(op, amd64_dump_node);
2961  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2962  set_op_copy_attr(op, be_copy_attr);
2963  set_op_tag(op, amd64_op_tag);
2964  op_amd64_not = op;
2965  op = new_ir_op(cur_opcode + iro_amd64_or, "amd64_or", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2966  set_op_dump(op, amd64_dump_node);
2967  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2968  set_op_copy_attr(op, be_copy_attr);
2969  set_op_tag(op, amd64_op_tag);
2970  op_amd64_or = op;
2971  op = new_ir_op(cur_opcode + iro_amd64_pop_am, "amd64_pop_am", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_addr_attr_t));
2972  set_op_dump(op, amd64_dump_node);
2973  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2974  set_op_copy_attr(op, be_copy_attr);
2975  set_op_tag(op, amd64_op_tag);
2976  op_amd64_pop_am = op;
2977  op = new_ir_op(cur_opcode + iro_amd64_punpckldq, "amd64_punpckldq", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
2978  set_op_dump(op, amd64_dump_node);
2979  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2980  set_op_copy_attr(op, be_copy_attr);
2981  set_op_tag(op, amd64_op_tag);
2982  op_amd64_punpckldq = op;
2983  op = new_ir_op(cur_opcode + iro_amd64_push_am, "amd64_push_am", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_addr_attr_t));
2984  set_op_dump(op, amd64_dump_node);
2985  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2986  set_op_copy_attr(op, be_copy_attr);
2987  set_op_tag(op, amd64_op_tag);
2988  op_amd64_push_am = op;
2989  op = new_ir_op(cur_opcode + iro_amd64_push_reg, "amd64_push_reg", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_attr_t));
2990  ir_op_set_memory_index(op, 1); set_op_dump(op, amd64_dump_node);
2991  set_op_attrs_equal(op, amd64_attrs_equal);
2992  set_op_copy_attr(op, be_copy_attr);
2993  set_op_tag(op, amd64_op_tag);
2994  op_amd64_push_reg = op;
2995  op = new_ir_op(cur_opcode + iro_amd64_ret, "amd64_ret", op_pin_state_pinned, irop_flag_cfopcode, oparity_any, -1, sizeof(amd64_attr_t));
2996  set_op_dump(op, amd64_dump_node);
2997  set_op_attrs_equal(op, amd64_attrs_equal);
2998  set_op_copy_attr(op, be_copy_attr);
2999  set_op_tag(op, amd64_op_tag);
3000  op_amd64_ret = op;
3001  op = new_ir_op(cur_opcode + iro_amd64_sar, "amd64_sar", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_shift_attr_t));
3002  set_op_dump(op, amd64_dump_node);
3003  set_op_attrs_equal(op, amd64_shift_attrs_equal);
3004  set_op_copy_attr(op, be_copy_attr);
3005  set_op_tag(op, amd64_op_tag);
3006  op_amd64_sar = op;
3007  op = new_ir_op(cur_opcode + iro_amd64_sbb, "amd64_sbb", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3008  set_op_dump(op, amd64_dump_node);
3009  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3010  set_op_copy_attr(op, be_copy_attr);
3011  set_op_tag(op, amd64_op_tag);
3012  op_amd64_sbb = op;
3013  op = new_ir_op(cur_opcode + iro_amd64_setcc, "amd64_setcc", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_cc_attr_t));
3014  set_op_dump(op, amd64_dump_node);
3015  set_op_attrs_equal(op, amd64_cc_attrs_equal);
3016  set_op_copy_attr(op, be_copy_attr);
3017  set_op_tag(op, amd64_op_tag);
3018  op_amd64_setcc = op;
3019  op = new_ir_op(cur_opcode + iro_amd64_shl, "amd64_shl", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_shift_attr_t));
3020  set_op_dump(op, amd64_dump_node);
3021  set_op_attrs_equal(op, amd64_shift_attrs_equal);
3022  set_op_copy_attr(op, be_copy_attr);
3023  set_op_tag(op, amd64_op_tag);
3024  op_amd64_shl = op;
3025  op = new_ir_op(cur_opcode + iro_amd64_shr, "amd64_shr", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_shift_attr_t));
3026  set_op_dump(op, amd64_dump_node);
3027  set_op_attrs_equal(op, amd64_shift_attrs_equal);
3028  set_op_copy_attr(op, be_copy_attr);
3029  set_op_tag(op, amd64_op_tag);
3030  op_amd64_shr = op;
3031  op = new_ir_op(cur_opcode + iro_amd64_sub, "amd64_sub", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3032  set_op_dump(op, amd64_dump_node);
3033  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3034  set_op_copy_attr(op, be_copy_attr);
3035  set_op_tag(op, amd64_op_tag);
3036  op_amd64_sub = op;
3037  op = new_ir_op(cur_opcode + iro_amd64_sub_sp, "amd64_sub_sp", op_pin_state_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3038  set_op_dump(op, amd64_dump_node);
3039  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3040  set_op_copy_attr(op, be_copy_attr);
3041  set_op_tag(op, amd64_op_tag);
3042  op_amd64_sub_sp = op;
3043  op = new_ir_op(cur_opcode + iro_amd64_subpd, "amd64_subpd", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3044  set_op_dump(op, amd64_dump_node);
3045  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3046  set_op_copy_attr(op, be_copy_attr);
3047  set_op_tag(op, amd64_op_tag);
3048  op_amd64_subpd = op;
3049  op = new_ir_op(cur_opcode + iro_amd64_subs, "amd64_subs", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3050  set_op_dump(op, amd64_dump_node);
3051  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3052  set_op_copy_attr(op, be_copy_attr);
3053  set_op_tag(op, amd64_op_tag);
3054  op_amd64_subs = op;
3055  op = new_ir_op(cur_opcode + iro_amd64_test, "amd64_test", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3056  set_op_dump(op, amd64_dump_node);
3057  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3058  set_op_copy_attr(op, be_copy_attr);
3059  set_op_tag(op, amd64_op_tag);
3060  op_amd64_test = op;
3061  op = new_ir_op(cur_opcode + iro_amd64_ucomis, "amd64_ucomis", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3062  set_op_dump(op, amd64_dump_node);
3063  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3064  set_op_copy_attr(op, be_copy_attr);
3065  set_op_tag(op, amd64_op_tag);
3066  op_amd64_ucomis = op;
3067  op = new_ir_op(cur_opcode + iro_amd64_xor, "amd64_xor", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3068  set_op_dump(op, amd64_dump_node);
3069  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3070  set_op_copy_attr(op, be_copy_attr);
3071  set_op_tag(op, amd64_op_tag);
3072  op_amd64_xor = op;
3073  op = new_ir_op(cur_opcode + iro_amd64_xor_0, "amd64_xor_0", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_attr_t));
3074  set_op_dump(op, amd64_dump_node);
3075  set_op_attrs_equal(op, amd64_attrs_equal);
3076  set_op_copy_attr(op, be_copy_attr);
3077  set_op_tag(op, amd64_op_tag);
3078  op_amd64_xor_0 = op;
3079  op = new_ir_op(cur_opcode + iro_amd64_xorp, "amd64_xorp", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_binop_addr_attr_t));
3080  set_op_dump(op, amd64_dump_node);
3081  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
3082  set_op_copy_attr(op, be_copy_attr);
3083  set_op_tag(op, amd64_op_tag);
3084  op_amd64_xorp = op;
3085  op = new_ir_op(cur_opcode + iro_amd64_xorp_0, "amd64_xorp_0", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_attr_t));
3086  set_op_dump(op, amd64_dump_node);
3087  set_op_attrs_equal(op, amd64_attrs_equal);
3088  set_op_copy_attr(op, be_copy_attr);
3089  set_op_tag(op, amd64_op_tag);
3090  op_amd64_xorp_0 = op;
3091 
3092 }
3093 
3094 void amd64_free_opcodes(void)
3095 {
3096  free_ir_op(op_amd64_add); op_amd64_add = NULL;
3097  free_ir_op(op_amd64_adds); op_amd64_adds = NULL;
3098  free_ir_op(op_amd64_and); op_amd64_and = NULL;
3099  free_ir_op(op_amd64_bsf); op_amd64_bsf = NULL;
3100  free_ir_op(op_amd64_bsr); op_amd64_bsr = NULL;
3101  free_ir_op(op_amd64_call); op_amd64_call = NULL;
3102  free_ir_op(op_amd64_cltd); op_amd64_cltd = NULL;
3103  free_ir_op(op_amd64_cmp); op_amd64_cmp = NULL;
3104  free_ir_op(op_amd64_cmpxchg); op_amd64_cmpxchg = NULL;
3105  free_ir_op(op_amd64_copyB); op_amd64_copyB = NULL;
3106  free_ir_op(op_amd64_copyB_i); op_amd64_copyB_i = NULL;
3107  free_ir_op(op_amd64_cqto); op_amd64_cqto = NULL;
3108  free_ir_op(op_amd64_cvtsd2ss); op_amd64_cvtsd2ss = NULL;
3109  free_ir_op(op_amd64_cvtsi2sd); op_amd64_cvtsi2sd = NULL;
3110  free_ir_op(op_amd64_cvtsi2ss); op_amd64_cvtsi2ss = NULL;
3111  free_ir_op(op_amd64_cvtss2sd); op_amd64_cvtss2sd = NULL;
3112  free_ir_op(op_amd64_cvttsd2si); op_amd64_cvttsd2si = NULL;
3113  free_ir_op(op_amd64_cvttss2si); op_amd64_cvttss2si = NULL;
3114  free_ir_op(op_amd64_div); op_amd64_div = NULL;
3115  free_ir_op(op_amd64_divs); op_amd64_divs = NULL;
3116  free_ir_op(op_amd64_fadd); op_amd64_fadd = NULL;
3117  free_ir_op(op_amd64_fchs); op_amd64_fchs = NULL;
3118  free_ir_op(op_amd64_fdiv); op_amd64_fdiv = NULL;
3119  free_ir_op(op_amd64_fdup); op_amd64_fdup = NULL;
3120  free_ir_op(op_amd64_fild); op_amd64_fild = NULL;
3121  free_ir_op(op_amd64_fisttp); op_amd64_fisttp = NULL;
3122  free_ir_op(op_amd64_fld); op_amd64_fld = NULL;
3123  free_ir_op(op_amd64_fld1); op_amd64_fld1 = NULL;
3124  free_ir_op(op_amd64_fldz); op_amd64_fldz = NULL;
3125  free_ir_op(op_amd64_fmul); op_amd64_fmul = NULL;
3126  free_ir_op(op_amd64_fpop); op_amd64_fpop = NULL;
3127  free_ir_op(op_amd64_fst); op_amd64_fst = NULL;
3128  free_ir_op(op_amd64_fstp); op_amd64_fstp = NULL;
3129  free_ir_op(op_amd64_fsub); op_amd64_fsub = NULL;
3130  free_ir_op(op_amd64_fucomi); op_amd64_fucomi = NULL;
3131  free_ir_op(op_amd64_fxch); op_amd64_fxch = NULL;
3132  free_ir_op(op_amd64_haddpd); op_amd64_haddpd = NULL;
3133  free_ir_op(op_amd64_idiv); op_amd64_idiv = NULL;
3134  free_ir_op(op_amd64_ijmp); op_amd64_ijmp = NULL;
3135  free_ir_op(op_amd64_imul); op_amd64_imul = NULL;
3136  free_ir_op(op_amd64_imul_1op); op_amd64_imul_1op = NULL;
3137  free_ir_op(op_amd64_jcc); op_amd64_jcc = NULL;
3138  free_ir_op(op_amd64_jmp); op_amd64_jmp = NULL;
3139  free_ir_op(op_amd64_jmp_switch); op_amd64_jmp_switch = NULL;
3140  free_ir_op(op_amd64_l_haddpd); op_amd64_l_haddpd = NULL;
3141  free_ir_op(op_amd64_l_punpckldq); op_amd64_l_punpckldq = NULL;
3142  free_ir_op(op_amd64_l_subpd); op_amd64_l_subpd = NULL;
3143  free_ir_op(op_amd64_lea); op_amd64_lea = NULL;
3144  free_ir_op(op_amd64_leave); op_amd64_leave = NULL;
3145  free_ir_op(op_amd64_mov_gp); op_amd64_mov_gp = NULL;
3146  free_ir_op(op_amd64_mov_imm); op_amd64_mov_imm = NULL;
3147  free_ir_op(op_amd64_mov_store); op_amd64_mov_store = NULL;
3148  free_ir_op(op_amd64_movd); op_amd64_movd = NULL;
3149  free_ir_op(op_amd64_movd_gp_xmm); op_amd64_movd_gp_xmm = NULL;
3150  free_ir_op(op_amd64_movd_xmm_gp); op_amd64_movd_xmm_gp = NULL;
3151  free_ir_op(op_amd64_movdqa); op_amd64_movdqa = NULL;
3152  free_ir_op(op_amd64_movdqu); op_amd64_movdqu = NULL;
3153  free_ir_op(op_amd64_movdqu_store); op_amd64_movdqu_store = NULL;
3154  free_ir_op(op_amd64_movs); op_amd64_movs = NULL;
3155  free_ir_op(op_amd64_movs_store_xmm); op_amd64_movs_store_xmm = NULL;
3156  free_ir_op(op_amd64_movs_xmm); op_amd64_movs_xmm = NULL;
3157  free_ir_op(op_amd64_mul); op_amd64_mul = NULL;
3158  free_ir_op(op_amd64_muls); op_amd64_muls = NULL;
3159  free_ir_op(op_amd64_neg); op_amd64_neg = NULL;
3160  free_ir_op(op_amd64_not); op_amd64_not = NULL;
3161  free_ir_op(op_amd64_or); op_amd64_or = NULL;
3162  free_ir_op(op_amd64_pop_am); op_amd64_pop_am = NULL;
3163  free_ir_op(op_amd64_punpckldq); op_amd64_punpckldq = NULL;
3164  free_ir_op(op_amd64_push_am); op_amd64_push_am = NULL;
3165  free_ir_op(op_amd64_push_reg); op_amd64_push_reg = NULL;
3166  free_ir_op(op_amd64_ret); op_amd64_ret = NULL;
3167  free_ir_op(op_amd64_sar); op_amd64_sar = NULL;
3168  free_ir_op(op_amd64_sbb); op_amd64_sbb = NULL;
3169  free_ir_op(op_amd64_setcc); op_amd64_setcc = NULL;
3170  free_ir_op(op_amd64_shl); op_amd64_shl = NULL;
3171  free_ir_op(op_amd64_shr); op_amd64_shr = NULL;
3172  free_ir_op(op_amd64_sub); op_amd64_sub = NULL;
3173  free_ir_op(op_amd64_sub_sp); op_amd64_sub_sp = NULL;
3174  free_ir_op(op_amd64_subpd); op_amd64_subpd = NULL;
3175  free_ir_op(op_amd64_subs); op_amd64_subs = NULL;
3176  free_ir_op(op_amd64_test); op_amd64_test = NULL;
3177  free_ir_op(op_amd64_ucomis); op_amd64_ucomis = NULL;
3178  free_ir_op(op_amd64_xor); op_amd64_xor = NULL;
3179  free_ir_op(op_amd64_xor_0); op_amd64_xor_0 = NULL;
3180  free_ir_op(op_amd64_xorp); op_amd64_xorp = NULL;
3181  free_ir_op(op_amd64_xorp_0); op_amd64_xorp_0 = NULL;
3182 
3183 }
set_op_dump
void set_op_dump(ir_op *op, dump_node_func func)
Sets dump callback func for operation op.
get_irn_generic_attr
void * get_irn_generic_attr(ir_node *node)
Returns a pointer to the node attributes.
mode_X
ir_mode * mode_X
execution
Definition: irmode.h:205
get_next_ir_opcodes
unsigned get_next_ir_opcodes(unsigned num)
Returns the next free n IR opcode number, allows to register a bunch of user ops. ...
set_op_attrs_equal
void set_op_attrs_equal(ir_op *op, node_attrs_equal_func func)
Sets attrs_equal callback func for operation op.
new_ir_op
ir_op * new_ir_op(unsigned code, const char *name, op_pin_state p, irop_flags flags, op_arity opar, int op_index, size_t attr_size)
Creates a new IR operation.
op_pin_state_floats
Nodes of this opcode can be placed in any basic block.
Definition: firm_types.h:202
ir_graph
struct ir_graph ir_graph
Procedure Graph.
Definition: firm_types.h:74
mode_ANY
ir_mode * mode_ANY
undefined mode
Definition: irmode.h:209
dbg_info
struct dbg_info dbg_info
Source Reference.
Definition: firm_types.h:40
ir_node
struct ir_node ir_node
Procedure Graph Node.
Definition: firm_types.h:53
mode_Iu
ir_mode * mode_Iu
uint32
Definition: irmode.h:187
irop_flag_forking
Forking control flow at this operation.
Definition: irop.h:48
new_ir_node
ir_node * new_ir_node(dbg_info *db, ir_graph *irg, ir_node *block, ir_op *op, ir_mode *mode, int arity, ir_node *const *in)
IR node constructor.
irop_flag_cfopcode
This operation is a control flow operation.
Definition: irop.h:44
get_irn_opcode
unsigned get_irn_opcode(const ir_node *node)
Returns the opcode-enum of the node.
ir_switch_table
struct ir_switch_table ir_switch_table
A switch table mapping integer numbers to proj-numbers of a Switch-node.
Definition: firm_types.h:105
irop_flag_keep
This operation can be kept in End's keep-alive list.
Definition: irop.h:51
ir_entity
struct ir_entity ir_entity
Entity.
Definition: firm_types.h:83
get_irn_irg
ir_graph * get_irn_irg(const ir_node *node)
Returns the ir_graph this node belongs to.
mode_M
ir_mode * mode_M
memory
Definition: irmode.h:178
op_pin_state_exc_pinned
Node must remain in this basic block if it can throw an exception, else can float.
Definition: firm_types.h:204
get_irn_op
ir_op * get_irn_op(const ir_node *node)
Returns the opcode struct of the node.
ir_op_set_memory_index
void ir_op_set_memory_index(ir_op *op, int memory_index)
Sets memory input of operation using memory.
ir_op
struct ir_op ir_op
Node Opcode.
Definition: firm_types.h:56
optimize_node
ir_node * optimize_node(ir_node *n)
Applies local optimizations to a single node.
free_ir_op
void free_ir_op(ir_op *code)
Frees an ir operation.
op_pin_state_pinned
Nodes must remain in this basic block.
Definition: firm_types.h:203
irop_flag_unknown_jump
This operation jumps to an unknown destination.
Definition: irop.h:58
mode_T
ir_mode * mode_T
tuple (none)
Definition: irmode.h:208
irop_flag_none
Nothing.
Definition: irop.h:42
irop_flag_constlike
This operation has no arguments and is some kind of a constant.
Definition: irop.h:49
verify_new_node
void verify_new_node(ir_node *node)
If firm is built in debug mode, verify that a newly created node is fine.
set_op_copy_attr
void set_op_copy_attr(ir_op *op, copy_attr_func func)
Sets attribute copy callback func for operation op.
irop_flag_uses_memory
This operation has a memory input and may change the memory state.
Definition: irop.h:53
oparity_any
Any other arity, either fixed for the opcode or known when creating the node.
Definition: irop.h:36
mode_Lu
ir_mode * mode_Lu
uint64
Definition: irmode.h:189