1 #include "gen_arm_new_nodes.h"
4 #include "arm_bearch_t.h"
5 #include "gen_arm_regalloc_if.h"
6 #include "arm_new_nodes_t.h"
11 ir_op *op_arm_AdC = NULL;
12 ir_op *op_arm_AdC_t = NULL;
13 ir_op *op_arm_Add = NULL;
14 ir_op *op_arm_AddS = NULL;
15 ir_op *op_arm_AddS_t = NULL;
16 ir_op *op_arm_Address = NULL;
17 ir_op *op_arm_Adf = NULL;
18 ir_op *op_arm_And = NULL;
19 ir_op *op_arm_B = NULL;
20 ir_op *op_arm_Bcc = NULL;
21 ir_op *op_arm_Bic = NULL;
22 ir_op *op_arm_Bl = NULL;
23 ir_op *op_arm_Clz = NULL;
24 ir_op *op_arm_Cmfe = NULL;
25 ir_op *op_arm_Cmn = NULL;
26 ir_op *op_arm_Cmp = NULL;
27 ir_op *op_arm_Dvf = NULL;
28 ir_op *op_arm_Eor = NULL;
29 ir_op *op_arm_Flt = NULL;
30 ir_op *op_arm_FrameAddr = NULL;
31 ir_op *op_arm_IJmp = NULL;
32 ir_op *op_arm_Ldf = NULL;
33 ir_op *op_arm_Ldr = NULL;
34 ir_op *op_arm_LinkLdrPC = NULL;
35 ir_op *op_arm_LinkMovPC = NULL;
36 ir_op *op_arm_Mla = NULL;
37 ir_op *op_arm_Mls = NULL;
38 ir_op *op_arm_Mov = NULL;
39 ir_op *op_arm_Muf = NULL;
40 ir_op *op_arm_Mul = NULL;
41 ir_op *op_arm_Mvf = NULL;
42 ir_op *op_arm_Mvn = NULL;
43 ir_op *op_arm_OrPl_t = NULL;
44 ir_op *op_arm_Orr = NULL;
45 ir_op *op_arm_OrrPl = NULL;
46 ir_op *op_arm_Pkhbt = NULL;
47 ir_op *op_arm_Pkhtb = NULL;
48 ir_op *op_arm_Return = NULL;
49 ir_op *op_arm_RsC = NULL;
50 ir_op *op_arm_Rsb = NULL;
51 ir_op *op_arm_RsbS = NULL;
52 ir_op *op_arm_SMulL = NULL;
53 ir_op *op_arm_SMulL_t = NULL;
54 ir_op *op_arm_SbC = NULL;
55 ir_op *op_arm_SbC_t = NULL;
56 ir_op *op_arm_Stf = NULL;
57 ir_op *op_arm_Str = NULL;
58 ir_op *op_arm_Sub = NULL;
59 ir_op *op_arm_SubS = NULL;
60 ir_op *op_arm_SubS_t = NULL;
61 ir_op *op_arm_Suf = NULL;
62 ir_op *op_arm_SwitchJmp = NULL;
63 ir_op *op_arm_Tst = NULL;
64 ir_op *op_arm_UMulL = NULL;
65 ir_op *op_arm_UMulL_t = NULL;
66 ir_op *op_arm_fConst = NULL;
69 static int arm_opcode_start = -1;
72 #define arm_op_tag FOURCC('a', 'r', 'm', '\0')
75 int is_arm_op(
const ir_op *op)
77 return get_op_tag(op) == arm_op_tag;
81 int is_arm_irn(
const ir_node *node)
86 int get_arm_irn_opcode(
const ir_node *node)
88 assert(is_arm_irn(node));
93 #define BIT(x) (1 << (x))
96 static const arch_register_req_t arm_requirements_gp_not_in_r0 = {
97 .cls = &arm_reg_classes[CLASS_arm_gp],
100 .must_be_different = 1,
104 static const arch_register_req_t arm_requirements_gp_in_r2_not_in_r0_not_in_r3 = {
105 .cls = &arm_reg_classes[CLASS_arm_gp],
108 .must_be_different = 9,
116 static arch_register_req_t
const *in_reqs[] = {
117 &arm_class_reg_req_gp,
118 &arm_class_reg_req_flags,
133 arch_irn_flags_t irn_flags = arch_irn_flags_none;
135 be_info_init_irn(res, irn_flags, in_reqs, n_res);
138 init_arm_attributes(res);
139 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
140 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
141 out_infos[0].req = &arm_class_reg_req_gp;
149 static arch_register_req_t
const *in_reqs[] = {
150 &arm_class_reg_req_gp,
151 &arm_class_reg_req_gp,
152 &arm_class_reg_req_flags,
168 arch_irn_flags_t irn_flags = arch_irn_flags_none;
170 be_info_init_irn(res, irn_flags, in_reqs, n_res);
173 init_arm_attributes(res);
174 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
175 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
176 out_infos[0].req = &arm_class_reg_req_gp;
184 static arch_register_req_t
const *in_reqs[] = {
185 &arm_class_reg_req_gp,
186 &arm_class_reg_req_gp,
187 &arm_class_reg_req_flags,
203 arch_irn_flags_t irn_flags = arch_irn_flags_none;
205 be_info_init_irn(res, irn_flags, in_reqs, n_res);
208 init_arm_attributes(res);
209 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
210 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
211 out_infos[0].req = &arm_class_reg_req_gp;
219 static arch_register_req_t
const *in_reqs[] = {
220 &arm_class_reg_req_gp,
221 &arm_class_reg_req_gp,
222 &arm_class_reg_req_gp,
223 &arm_class_reg_req_flags,
240 arch_irn_flags_t irn_flags = arch_irn_flags_none;
242 be_info_init_irn(res, irn_flags, in_reqs, n_res);
245 init_arm_attributes(res);
246 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
247 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
248 out_infos[0].req = &arm_class_reg_req_gp;
275 static arch_register_req_t
const *in_reqs[] = {
276 &arm_class_reg_req_gp,
290 arch_irn_flags_t irn_flags = arch_irn_flags_none;
291 irn_flags |= arch_irn_flag_rematerializable;
293 be_info_init_irn(res, irn_flags, in_reqs, n_res);
296 init_arm_attributes(res);
297 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
298 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
299 out_infos[0].req = &arm_class_reg_req_gp;
307 static arch_register_req_t
const *in_reqs[] = {
308 &arm_class_reg_req_gp,
309 &arm_class_reg_req_gp,
324 arch_irn_flags_t irn_flags = arch_irn_flags_none;
325 irn_flags |= arch_irn_flag_rematerializable;
327 be_info_init_irn(res, irn_flags, in_reqs, n_res);
330 init_arm_attributes(res);
331 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
332 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
333 out_infos[0].req = &arm_class_reg_req_gp;
341 static arch_register_req_t
const *in_reqs[] = {
342 &arm_class_reg_req_gp,
343 &arm_class_reg_req_gp,
358 arch_irn_flags_t irn_flags = arch_irn_flags_none;
359 irn_flags |= arch_irn_flag_rematerializable;
361 be_info_init_irn(res, irn_flags, in_reqs, n_res);
364 init_arm_attributes(res);
365 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
366 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
367 out_infos[0].req = &arm_class_reg_req_gp;
375 static arch_register_req_t
const *in_reqs[] = {
376 &arm_class_reg_req_gp,
377 &arm_class_reg_req_gp,
378 &arm_class_reg_req_gp,
394 arch_irn_flags_t irn_flags = arch_irn_flags_none;
395 irn_flags |= arch_irn_flag_rematerializable;
397 be_info_init_irn(res, irn_flags, in_reqs, n_res);
400 init_arm_attributes(res);
401 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
402 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
403 out_infos[0].req = &arm_class_reg_req_gp;
411 static arch_register_req_t
const *in_reqs[] = {
412 &arm_class_reg_req_gp,
426 arch_irn_flags_t irn_flags = arch_irn_flags_none;
427 irn_flags |= arch_irn_flag_modify_flags;
428 irn_flags |= arch_irn_flag_rematerializable;
430 be_info_init_irn(res, irn_flags, in_reqs, n_res);
433 init_arm_attributes(res);
434 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
435 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
436 out_infos[0].req = &arm_class_reg_req_gp;
437 out_infos[1].req = &arm_class_reg_req_flags;
445 static arch_register_req_t
const *in_reqs[] = {
446 &arm_class_reg_req_gp,
447 &arm_class_reg_req_gp,
462 arch_irn_flags_t irn_flags = arch_irn_flags_none;
463 irn_flags |= arch_irn_flag_modify_flags;
464 irn_flags |= arch_irn_flag_rematerializable;
466 be_info_init_irn(res, irn_flags, in_reqs, n_res);
469 init_arm_attributes(res);
470 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
471 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
472 out_infos[0].req = &arm_class_reg_req_gp;
473 out_infos[1].req = &arm_class_reg_req_flags;
481 static arch_register_req_t
const *in_reqs[] = {
482 &arm_class_reg_req_gp,
483 &arm_class_reg_req_gp,
498 arch_irn_flags_t irn_flags = arch_irn_flags_none;
499 irn_flags |= arch_irn_flag_modify_flags;
500 irn_flags |= arch_irn_flag_rematerializable;
502 be_info_init_irn(res, irn_flags, in_reqs, n_res);
505 init_arm_attributes(res);
506 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
507 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
508 out_infos[0].req = &arm_class_reg_req_gp;
509 out_infos[1].req = &arm_class_reg_req_flags;
517 static arch_register_req_t
const *in_reqs[] = {
518 &arm_class_reg_req_gp,
519 &arm_class_reg_req_gp,
520 &arm_class_reg_req_gp,
536 arch_irn_flags_t irn_flags = arch_irn_flags_none;
537 irn_flags |= arch_irn_flag_modify_flags;
538 irn_flags |= arch_irn_flag_rematerializable;
540 be_info_init_irn(res, irn_flags, in_reqs, n_res);
543 init_arm_attributes(res);
544 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
545 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
546 out_infos[0].req = &arm_class_reg_req_gp;
547 out_infos[1].req = &arm_class_reg_req_flags;
573 arch_register_req_t
const **
const in_reqs = NULL;
577 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Address, arm_mode_gp, 0, NULL);
582 arch_irn_flags_t irn_flags = arch_irn_flags_none;
583 irn_flags |= arch_irn_flag_rematerializable;
585 be_info_init_irn(res, irn_flags, in_reqs, n_res);
588 init_arm_attributes(res);
589 init_arm_Address_attributes(res, entity, offset);
590 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
591 out_infos[0].req = &arm_class_reg_req_gp;
599 static arch_register_req_t
const *in_reqs[] = {
600 &arm_class_reg_req_fpa,
601 &arm_class_reg_req_fpa,
616 arch_irn_flags_t irn_flags = arch_irn_flags_none;
617 irn_flags |= arch_irn_flag_rematerializable;
619 be_info_init_irn(res, irn_flags, in_reqs, n_res);
622 init_arm_attributes(res);
623 init_arm_farith_attributes(res, op_mode);
624 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
625 out_infos[0].req = &arm_class_reg_req_fpa;
633 static arch_register_req_t
const *in_reqs[] = {
634 &arm_class_reg_req_gp,
648 arch_irn_flags_t irn_flags = arch_irn_flags_none;
649 irn_flags |= arch_irn_flag_rematerializable;
651 be_info_init_irn(res, irn_flags, in_reqs, n_res);
654 init_arm_attributes(res);
655 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
656 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
657 out_infos[0].req = &arm_class_reg_req_gp;
665 static arch_register_req_t
const *in_reqs[] = {
666 &arm_class_reg_req_gp,
667 &arm_class_reg_req_gp,
682 arch_irn_flags_t irn_flags = arch_irn_flags_none;
683 irn_flags |= arch_irn_flag_rematerializable;
685 be_info_init_irn(res, irn_flags, in_reqs, n_res);
688 init_arm_attributes(res);
689 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
690 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
691 out_infos[0].req = &arm_class_reg_req_gp;
699 static arch_register_req_t
const *in_reqs[] = {
700 &arm_class_reg_req_gp,
701 &arm_class_reg_req_gp,
716 arch_irn_flags_t irn_flags = arch_irn_flags_none;
717 irn_flags |= arch_irn_flag_rematerializable;
719 be_info_init_irn(res, irn_flags, in_reqs, n_res);
722 init_arm_attributes(res);
723 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
724 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
725 out_infos[0].req = &arm_class_reg_req_gp;
733 static arch_register_req_t
const *in_reqs[] = {
734 &arm_class_reg_req_gp,
735 &arm_class_reg_req_gp,
736 &arm_class_reg_req_gp,
752 arch_irn_flags_t irn_flags = arch_irn_flags_none;
753 irn_flags |= arch_irn_flag_rematerializable;
755 be_info_init_irn(res, irn_flags, in_reqs, n_res);
758 init_arm_attributes(res);
759 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
760 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
761 out_infos[0].req = &arm_class_reg_req_gp;
769 arch_register_req_t
const **
const in_reqs = NULL;
778 arch_irn_flags_t irn_flags = arch_irn_flags_none;
779 irn_flags |= arch_irn_flag_simple_jump;
780 irn_flags |= arch_irn_flag_fallthrough;
782 be_info_init_irn(res, irn_flags, in_reqs, n_res);
785 init_arm_attributes(res);
786 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
787 out_infos[0].req = &arch_exec_requirement;
795 static arch_register_req_t
const *in_reqs[] = {
796 &arm_class_reg_req_flags,
810 arch_irn_flags_t irn_flags = arch_irn_flags_none;
811 irn_flags |= arch_irn_flag_fallthrough;
813 be_info_init_irn(res, irn_flags, in_reqs, n_res);
816 init_arm_attributes(res);
817 set_arm_CondJmp_relation(res, relation);
818 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
819 out_infos[0].req = &arch_exec_requirement;
820 out_infos[1].req = &arch_exec_requirement;
828 static arch_register_req_t
const *in_reqs[] = {
829 &arm_class_reg_req_gp,
843 arch_irn_flags_t irn_flags = arch_irn_flags_none;
844 irn_flags |= arch_irn_flag_rematerializable;
846 be_info_init_irn(res, irn_flags, in_reqs, n_res);
849 init_arm_attributes(res);
850 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
851 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
852 out_infos[0].req = &arm_class_reg_req_gp;
860 static arch_register_req_t
const *in_reqs[] = {
861 &arm_class_reg_req_gp,
862 &arm_class_reg_req_gp,
877 arch_irn_flags_t irn_flags = arch_irn_flags_none;
878 irn_flags |= arch_irn_flag_rematerializable;
880 be_info_init_irn(res, irn_flags, in_reqs, n_res);
883 init_arm_attributes(res);
884 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
885 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
886 out_infos[0].req = &arm_class_reg_req_gp;
894 static arch_register_req_t
const *in_reqs[] = {
895 &arm_class_reg_req_gp,
896 &arm_class_reg_req_gp,
911 arch_irn_flags_t irn_flags = arch_irn_flags_none;
912 irn_flags |= arch_irn_flag_rematerializable;
914 be_info_init_irn(res, irn_flags, in_reqs, n_res);
917 init_arm_attributes(res);
918 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
919 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
920 out_infos[0].req = &arm_class_reg_req_gp;
928 static arch_register_req_t
const *in_reqs[] = {
929 &arm_class_reg_req_gp,
930 &arm_class_reg_req_gp,
931 &arm_class_reg_req_gp,
947 arch_irn_flags_t irn_flags = arch_irn_flags_none;
948 irn_flags |= arch_irn_flag_rematerializable;
950 be_info_init_irn(res, irn_flags, in_reqs, n_res);
953 init_arm_attributes(res);
954 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
955 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
956 out_infos[0].req = &arm_class_reg_req_gp;
972 arch_irn_flags_t irn_flags = arch_irn_flags_none;
973 irn_flags |= arch_irn_flag_modify_flags;
974 be_info_init_irn(res, irn_flags, in_reqs, n_res);
977 init_arm_attributes(res);
978 init_arm_Address_attributes(res, entity, offset);
986 static arch_register_req_t
const *in_reqs[] = {
987 &arm_class_reg_req_gp,
1001 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1002 irn_flags |= arch_irn_flag_rematerializable;
1003 int const n_res = 1;
1004 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1007 init_arm_attributes(res);
1008 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1009 out_infos[0].req = &arm_class_reg_req_gp;
1017 static arch_register_req_t
const *in_reqs[] = {
1018 &arm_class_reg_req_fpa,
1019 &arm_class_reg_req_fpa,
1029 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmfe, arm_mode_flags, 2, in);
1034 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1035 irn_flags |= arch_irn_flag_rematerializable;
1036 irn_flags |= arch_irn_flag_modify_flags;
1037 int const n_res = 1;
1038 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1041 bool const is_unsigned =
false;
1042 init_arm_attributes(res);
1043 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1044 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1045 out_infos[0].req = &arm_class_reg_req_flags;
1051 ir_node *new_bd_arm_Cmn_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
unsigned char immediate_value,
unsigned char immediate_rot,
bool ins_permuted,
bool is_unsigned)
1053 static arch_register_req_t
const *in_reqs[] = {
1054 &arm_class_reg_req_gp,
1063 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 1, in);
1068 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1069 irn_flags |= arch_irn_flag_rematerializable;
1070 irn_flags |= arch_irn_flag_modify_flags;
1071 int const n_res = 1;
1072 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1075 init_arm_attributes(res);
1076 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1077 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1079 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1080 out_infos[0].req = &arm_class_reg_req_flags;
1088 static arch_register_req_t
const *in_reqs[] = {
1089 &arm_class_reg_req_gp,
1090 &arm_class_reg_req_gp,
1100 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 2, in);
1105 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1106 irn_flags |= arch_irn_flag_rematerializable;
1107 irn_flags |= arch_irn_flag_modify_flags;
1108 int const n_res = 1;
1109 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1112 init_arm_attributes(res);
1113 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1114 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1116 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1117 out_infos[0].req = &arm_class_reg_req_flags;
1123 ir_node *new_bd_arm_Cmn_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
ir_node *right, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate,
bool ins_permuted,
bool is_unsigned)
1125 static arch_register_req_t
const *in_reqs[] = {
1126 &arm_class_reg_req_gp,
1127 &arm_class_reg_req_gp,
1137 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 2, in);
1142 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1143 irn_flags |= arch_irn_flag_rematerializable;
1144 irn_flags |= arch_irn_flag_modify_flags;
1145 int const n_res = 1;
1146 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1149 init_arm_attributes(res);
1150 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1151 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1153 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1154 out_infos[0].req = &arm_class_reg_req_flags;
1162 static arch_register_req_t
const *in_reqs[] = {
1163 &arm_class_reg_req_gp,
1164 &arm_class_reg_req_gp,
1165 &arm_class_reg_req_gp,
1176 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 3, in);
1181 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1182 irn_flags |= arch_irn_flag_rematerializable;
1183 irn_flags |= arch_irn_flag_modify_flags;
1184 int const n_res = 1;
1185 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1188 init_arm_attributes(res);
1189 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1190 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1192 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1193 out_infos[0].req = &arm_class_reg_req_flags;
1199 ir_node *new_bd_arm_Cmp_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
unsigned char immediate_value,
unsigned char immediate_rot,
bool ins_permuted,
bool is_unsigned)
1201 static arch_register_req_t
const *in_reqs[] = {
1202 &arm_class_reg_req_gp,
1211 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 1, in);
1216 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1217 irn_flags |= arch_irn_flag_rematerializable;
1218 irn_flags |= arch_irn_flag_modify_flags;
1219 int const n_res = 1;
1220 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1223 init_arm_attributes(res);
1224 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1225 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1227 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1228 out_infos[0].req = &arm_class_reg_req_flags;
1236 static arch_register_req_t
const *in_reqs[] = {
1237 &arm_class_reg_req_gp,
1238 &arm_class_reg_req_gp,
1248 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 2, in);
1253 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1254 irn_flags |= arch_irn_flag_rematerializable;
1255 irn_flags |= arch_irn_flag_modify_flags;
1256 int const n_res = 1;
1257 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1260 init_arm_attributes(res);
1261 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1262 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1264 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1265 out_infos[0].req = &arm_class_reg_req_flags;
1271 ir_node *new_bd_arm_Cmp_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
ir_node *right, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate,
bool ins_permuted,
bool is_unsigned)
1273 static arch_register_req_t
const *in_reqs[] = {
1274 &arm_class_reg_req_gp,
1275 &arm_class_reg_req_gp,
1285 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 2, in);
1290 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1291 irn_flags |= arch_irn_flag_rematerializable;
1292 irn_flags |= arch_irn_flag_modify_flags;
1293 int const n_res = 1;
1294 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1297 init_arm_attributes(res);
1298 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1299 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1301 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1302 out_infos[0].req = &arm_class_reg_req_flags;
1310 static arch_register_req_t
const *in_reqs[] = {
1311 &arm_class_reg_req_gp,
1312 &arm_class_reg_req_gp,
1313 &arm_class_reg_req_gp,
1324 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 3, in);
1329 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1330 irn_flags |= arch_irn_flag_rematerializable;
1331 irn_flags |= arch_irn_flag_modify_flags;
1332 int const n_res = 1;
1333 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1336 init_arm_attributes(res);
1337 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1338 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1340 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1341 out_infos[0].req = &arm_class_reg_req_flags;
1349 static arch_register_req_t
const *in_reqs[] = {
1350 &arm_class_reg_req_fpa,
1351 &arm_class_reg_req_fpa,
1366 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1367 int const n_res = 2;
1368 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1371 init_arm_attributes(res);
1372 init_arm_farith_attributes(res, op_mode);
1373 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1374 out_infos[0].req = &arm_class_reg_req_fpa;
1375 out_infos[1].req = &arch_memory_requirement;
1383 static arch_register_req_t
const *in_reqs[] = {
1384 &arm_class_reg_req_gp,
1398 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1399 irn_flags |= arch_irn_flag_rematerializable;
1400 int const n_res = 1;
1401 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1404 init_arm_attributes(res);
1405 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1406 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1407 out_infos[0].req = &arm_class_reg_req_gp;
1415 static arch_register_req_t
const *in_reqs[] = {
1416 &arm_class_reg_req_gp,
1417 &arm_class_reg_req_gp,
1432 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1433 irn_flags |= arch_irn_flag_rematerializable;
1434 int const n_res = 1;
1435 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1438 init_arm_attributes(res);
1439 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1440 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1441 out_infos[0].req = &arm_class_reg_req_gp;
1449 static arch_register_req_t
const *in_reqs[] = {
1450 &arm_class_reg_req_gp,
1451 &arm_class_reg_req_gp,
1466 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1467 irn_flags |= arch_irn_flag_rematerializable;
1468 int const n_res = 1;
1469 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1472 init_arm_attributes(res);
1473 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1474 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1475 out_infos[0].req = &arm_class_reg_req_gp;
1483 static arch_register_req_t
const *in_reqs[] = {
1484 &arm_class_reg_req_gp,
1485 &arm_class_reg_req_gp,
1486 &arm_class_reg_req_gp,
1502 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1503 irn_flags |= arch_irn_flag_rematerializable;
1504 int const n_res = 1;
1505 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1508 init_arm_attributes(res);
1509 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1510 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1511 out_infos[0].req = &arm_class_reg_req_gp;
1519 static arch_register_req_t
const *in_reqs[] = {
1520 &arm_class_reg_req_gp,
1534 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1535 irn_flags |= arch_irn_flag_rematerializable;
1536 int const n_res = 1;
1537 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1540 init_arm_attributes(res);
1541 init_arm_farith_attributes(res, op_mode);
1542 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1543 out_infos[0].req = &arm_class_reg_req_fpa;
1551 static arch_register_req_t
const *in_reqs[] = {
1552 &arm_class_reg_req_gp,
1561 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_FrameAddr, arm_mode_gp, 1, in);
1566 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1567 irn_flags |= arch_irn_flag_rematerializable;
1568 int const n_res = 1;
1569 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1572 init_arm_attributes(res);
1573 init_arm_Address_attributes(res, entity, offset);
1574 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1575 out_infos[0].req = &arm_class_reg_req_gp;
1583 static arch_register_req_t
const *in_reqs[] = {
1584 &arm_class_reg_req_gp,
1598 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1599 int const n_res = 1;
1600 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1603 init_arm_attributes(res);
1604 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1605 out_infos[0].req = &arch_exec_requirement;
1613 static arch_register_req_t
const *in_reqs[] = {
1614 &arm_class_reg_req_gp,
1615 &arch_memory_requirement,
1630 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1631 int const n_res = 2;
1632 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1635 init_arm_attributes(res);
1636 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1637 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1638 out_infos[0].req = &arm_class_reg_req_fpa;
1639 out_infos[1].req = &arch_memory_requirement;
1647 static arch_register_req_t
const *in_reqs[] = {
1648 &arm_class_reg_req_gp,
1649 &arch_memory_requirement,
1664 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1665 int const n_res = 2;
1666 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1669 init_arm_attributes(res);
1670 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1671 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1672 out_infos[0].req = &arm_class_reg_req_gp;
1673 out_infos[1].req = &arch_memory_requirement;
1679 ir_node *new_bd_arm_LinkLdrPC(
dbg_info *dbgi,
ir_node *block,
int const arity,
ir_node *
const *
const in, arch_register_req_t
const **
const in_reqs,
int n_res,
ir_mode *ls_mode,
ir_entity *entity,
int entity_sign,
long offset,
bool is_frame_entity)
1689 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1690 irn_flags |= arch_irn_flag_modify_flags;
1691 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1694 init_arm_attributes(res);
1695 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1701 ir_node *new_bd_arm_LinkMovPC(
dbg_info *dbgi,
ir_node *block,
int const arity,
ir_node *
const *
const in, arch_register_req_t
const **
const in_reqs,
int n_res,
unsigned shiftop_input, arm_shift_modifier_t shift_modifier,
unsigned char immediate_value,
unsigned char immediate_rot)
1711 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1712 irn_flags |= arch_irn_flag_modify_flags;
1713 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1716 init_arm_attributes(res);
1717 init_arm_shifter_operand(res, shiftop_input, immediate_value, shift_modifier, immediate_rot);
1726 static arch_register_req_t
const *in_reqs[] = {
1727 &arm_class_reg_req_gp,
1728 &arm_class_reg_req_gp,
1729 &arm_class_reg_req_gp,
1745 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1746 irn_flags |= arch_irn_flag_rematerializable;
1747 int const n_res = 1;
1748 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1751 init_arm_attributes(res);
1752 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1753 out_infos[0].req = &arm_class_reg_req_gp;
1761 static arch_register_req_t
const *in_reqs[] = {
1762 &arm_class_reg_req_gp,
1763 &arm_class_reg_req_gp,
1764 &arm_class_reg_req_gp,
1780 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1781 irn_flags |= arch_irn_flag_rematerializable;
1782 int const n_res = 1;
1783 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1786 init_arm_attributes(res);
1787 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1788 out_infos[0].req = &arm_requirements_gp_not_in_r0;
1796 static arch_register_req_t
const *in_reqs[] = {
1797 &arm_class_reg_req_gp,
1798 &arm_class_reg_req_gp,
1799 &arm_class_reg_req_gp,
1815 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1816 irn_flags |= arch_irn_flag_rematerializable;
1817 int const n_res = 1;
1818 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1821 init_arm_attributes(res);
1822 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1823 out_infos[0].req = &arm_class_reg_req_gp;
1829 ir_node *new_bd_arm_Mov_imm(
dbg_info *dbgi,
ir_node *block,
unsigned char immediate_value,
unsigned char immediate_rot)
1831 static arch_register_req_t
const *in_reqs[] = {
1836 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 0, NULL);
1841 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1842 irn_flags |= arch_irn_flag_rematerializable;
1843 int const n_res = 1;
1844 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1847 init_arm_attributes(res);
1848 init_arm_shifter_operand(res, 0, immediate_value, ARM_SHF_IMM, immediate_rot);
1849 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1850 out_infos[0].req = &arm_class_reg_req_gp;
1858 static arch_register_req_t
const *in_reqs[] = {
1859 &arm_class_reg_req_gp,
1873 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1874 irn_flags |= arch_irn_flag_rematerializable;
1875 int const n_res = 1;
1876 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1879 init_arm_attributes(res);
1880 init_arm_shifter_operand(res, 0, 0, ARM_SHF_REG, 0);
1881 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1882 out_infos[0].req = &arm_class_reg_req_gp;
1888 ir_node *new_bd_arm_Mov_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *Rm, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate)
1890 static arch_register_req_t
const *in_reqs[] = {
1891 &arm_class_reg_req_gp,
1905 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1906 irn_flags |= arch_irn_flag_rematerializable;
1907 int const n_res = 1;
1908 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1911 init_arm_attributes(res);
1912 init_arm_shifter_operand(res, 0, 0, shift_modifier, shift_immediate);
1913 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1914 out_infos[0].req = &arm_class_reg_req_gp;
1922 static arch_register_req_t
const *in_reqs[] = {
1923 &arm_class_reg_req_gp,
1924 &arm_class_reg_req_gp,
1939 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1940 irn_flags |= arch_irn_flag_rematerializable;
1941 int const n_res = 1;
1942 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1945 init_arm_attributes(res);
1946 init_arm_shifter_operand(res, 0, 0, shift_modifier, 0);
1947 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1948 out_infos[0].req = &arm_class_reg_req_gp;
1956 static arch_register_req_t
const *in_reqs[] = {
1957 &arm_class_reg_req_fpa,
1958 &arm_class_reg_req_fpa,
1973 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1974 irn_flags |= arch_irn_flag_rematerializable;
1975 int const n_res = 1;
1976 be_info_init_irn(res, irn_flags, in_reqs, n_res);
1979 init_arm_attributes(res);
1980 init_arm_farith_attributes(res, op_mode);
1981 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1982 out_infos[0].req = &arm_class_reg_req_fpa;
1990 static arch_register_req_t
const *in_reqs[] = {
1991 &arm_class_reg_req_gp,
1992 &arm_class_reg_req_gp,
2007 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2008 irn_flags |= arch_irn_flag_rematerializable;
2009 int const n_res = 1;
2010 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2013 init_arm_attributes(res);
2014 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2015 out_infos[0].req = &arm_class_reg_req_gp;
2023 static arch_register_req_t
const *in_reqs[] = {
2024 &arm_class_reg_req_gp,
2025 &arm_class_reg_req_gp,
2040 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2041 irn_flags |= arch_irn_flag_rematerializable;
2042 int const n_res = 1;
2043 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2046 init_arm_attributes(res);
2047 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2048 out_infos[0].req = &arm_requirements_gp_not_in_r0;
2056 static arch_register_req_t
const *in_reqs[] = {
2057 &arm_class_reg_req_fpa,
2071 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2072 irn_flags |= arch_irn_flag_rematerializable;
2073 int const n_res = 1;
2074 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2077 init_arm_attributes(res);
2078 init_arm_farith_attributes(res, op_mode);
2079 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2080 out_infos[0].req = &arm_class_reg_req_fpa;
2086 ir_node *new_bd_arm_Mvn_imm(
dbg_info *dbgi,
ir_node *block,
unsigned char immediate_value,
unsigned char immediate_rot)
2088 static arch_register_req_t
const *in_reqs[] = {
2093 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 0, NULL);
2098 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2099 irn_flags |= arch_irn_flag_rematerializable;
2100 int const n_res = 1;
2101 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2104 init_arm_attributes(res);
2105 init_arm_shifter_operand(res, 0, immediate_value, ARM_SHF_IMM, immediate_rot);
2106 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2107 out_infos[0].req = &arm_class_reg_req_gp;
2115 static arch_register_req_t
const *in_reqs[] = {
2116 &arm_class_reg_req_gp,
2130 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2131 irn_flags |= arch_irn_flag_rematerializable;
2132 int const n_res = 1;
2133 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2136 init_arm_attributes(res);
2137 init_arm_shifter_operand(res, 0, 0, ARM_SHF_REG, 0);
2138 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2139 out_infos[0].req = &arm_class_reg_req_gp;
2145 ir_node *new_bd_arm_Mvn_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *Rm, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate)
2147 static arch_register_req_t
const *in_reqs[] = {
2148 &arm_class_reg_req_gp,
2162 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2163 irn_flags |= arch_irn_flag_rematerializable;
2164 int const n_res = 1;
2165 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2168 init_arm_attributes(res);
2169 init_arm_shifter_operand(res, 0, 0, shift_modifier, shift_immediate);
2170 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2171 out_infos[0].req = &arm_class_reg_req_gp;
2179 static arch_register_req_t
const *in_reqs[] = {
2180 &arm_class_reg_req_gp,
2181 &arm_class_reg_req_gp,
2196 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2197 irn_flags |= arch_irn_flag_rematerializable;
2198 int const n_res = 1;
2199 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2202 init_arm_attributes(res);
2203 init_arm_shifter_operand(res, 0, 0, shift_modifier, 0);
2204 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2205 out_infos[0].req = &arm_class_reg_req_gp;
2233 static arch_register_req_t
const *in_reqs[] = {
2234 &arm_class_reg_req_gp,
2248 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2249 irn_flags |= arch_irn_flag_rematerializable;
2250 int const n_res = 1;
2251 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2254 init_arm_attributes(res);
2255 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2256 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2257 out_infos[0].req = &arm_class_reg_req_gp;
2265 static arch_register_req_t
const *in_reqs[] = {
2266 &arm_class_reg_req_gp,
2267 &arm_class_reg_req_gp,
2282 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2283 irn_flags |= arch_irn_flag_rematerializable;
2284 int const n_res = 1;
2285 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2288 init_arm_attributes(res);
2289 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2290 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2291 out_infos[0].req = &arm_class_reg_req_gp;
2299 static arch_register_req_t
const *in_reqs[] = {
2300 &arm_class_reg_req_gp,
2301 &arm_class_reg_req_gp,
2316 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2317 irn_flags |= arch_irn_flag_rematerializable;
2318 int const n_res = 1;
2319 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2322 init_arm_attributes(res);
2323 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2324 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2325 out_infos[0].req = &arm_class_reg_req_gp;
2333 static arch_register_req_t
const *in_reqs[] = {
2334 &arm_class_reg_req_gp,
2335 &arm_class_reg_req_gp,
2336 &arm_class_reg_req_gp,
2352 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2353 irn_flags |= arch_irn_flag_rematerializable;
2354 int const n_res = 1;
2355 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2358 init_arm_attributes(res);
2359 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2360 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2361 out_infos[0].req = &arm_class_reg_req_gp;
2369 static arch_register_req_t
const *in_reqs[] = {
2370 &arm_class_reg_req_gp,
2371 &arm_class_reg_req_flags,
2372 &arm_class_reg_req_gp,
2373 &arm_class_reg_req_gp,
2385 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_OrrPl, arm_mode_gp, 4, in);
2390 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2391 int const n_res = 1;
2392 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2395 init_arm_attributes(res);
2396 init_arm_shifter_operand(res, 3, 0, ARM_SHF_REG, 0);
2397 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2398 out_infos[0].req = &arm_requirements_gp_in_r2_not_in_r0_not_in_r3;
2406 static arch_register_req_t
const *in_reqs[] = {
2407 &arm_class_reg_req_gp,
2416 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 1, in);
2421 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2422 irn_flags |= arch_irn_flag_rematerializable;
2423 int const n_res = 1;
2424 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2427 init_arm_attributes(res);
2428 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2429 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2430 out_infos[0].req = &arm_class_reg_req_gp;
2438 static arch_register_req_t
const *in_reqs[] = {
2439 &arm_class_reg_req_gp,
2440 &arm_class_reg_req_gp,
2450 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 2, in);
2455 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2456 irn_flags |= arch_irn_flag_rematerializable;
2457 int const n_res = 1;
2458 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2461 init_arm_attributes(res);
2462 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2463 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2464 out_infos[0].req = &arm_class_reg_req_gp;
2472 static arch_register_req_t
const *in_reqs[] = {
2473 &arm_class_reg_req_gp,
2474 &arm_class_reg_req_gp,
2484 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 2, in);
2489 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2490 irn_flags |= arch_irn_flag_rematerializable;
2491 int const n_res = 1;
2492 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2495 init_arm_attributes(res);
2496 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2497 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2498 out_infos[0].req = &arm_class_reg_req_gp;
2506 static arch_register_req_t
const *in_reqs[] = {
2507 &arm_class_reg_req_gp,
2508 &arm_class_reg_req_gp,
2509 &arm_class_reg_req_gp,
2520 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 3, in);
2525 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2526 irn_flags |= arch_irn_flag_rematerializable;
2527 int const n_res = 1;
2528 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2531 init_arm_attributes(res);
2532 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2533 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2534 out_infos[0].req = &arm_class_reg_req_gp;
2542 static arch_register_req_t
const *in_reqs[] = {
2543 &arm_class_reg_req_gp,
2552 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 1, in);
2557 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2558 irn_flags |= arch_irn_flag_rematerializable;
2559 int const n_res = 1;
2560 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2563 init_arm_attributes(res);
2564 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2565 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2566 out_infos[0].req = &arm_class_reg_req_gp;
2574 static arch_register_req_t
const *in_reqs[] = {
2575 &arm_class_reg_req_gp,
2576 &arm_class_reg_req_gp,
2586 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 2, in);
2591 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2592 irn_flags |= arch_irn_flag_rematerializable;
2593 int const n_res = 1;
2594 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2597 init_arm_attributes(res);
2598 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2599 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2600 out_infos[0].req = &arm_class_reg_req_gp;
2608 static arch_register_req_t
const *in_reqs[] = {
2609 &arm_class_reg_req_gp,
2610 &arm_class_reg_req_gp,
2620 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 2, in);
2625 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2626 irn_flags |= arch_irn_flag_rematerializable;
2627 int const n_res = 1;
2628 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2631 init_arm_attributes(res);
2632 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2633 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2634 out_infos[0].req = &arm_class_reg_req_gp;
2642 static arch_register_req_t
const *in_reqs[] = {
2643 &arm_class_reg_req_gp,
2644 &arm_class_reg_req_gp,
2645 &arm_class_reg_req_gp,
2656 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 3, in);
2661 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2662 irn_flags |= arch_irn_flag_rematerializable;
2663 int const n_res = 1;
2664 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2667 init_arm_attributes(res);
2668 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2669 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2670 out_infos[0].req = &arm_class_reg_req_gp;
2676 ir_node *new_bd_arm_Return(
dbg_info *dbgi,
ir_node *block,
int const arity,
ir_node *
const *
const in, arch_register_req_t
const **
const in_reqs)
2686 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2687 int const n_res = 1;
2688 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2691 init_arm_attributes(res);
2692 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2693 out_infos[0].req = &arch_exec_requirement;
2701 static arch_register_req_t
const *in_reqs[] = {
2702 &arm_class_reg_req_gp,
2703 &arm_class_reg_req_flags,
2718 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2719 int const n_res = 1;
2720 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2723 init_arm_attributes(res);
2724 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2725 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2726 out_infos[0].req = &arm_class_reg_req_gp;
2734 static arch_register_req_t
const *in_reqs[] = {
2735 &arm_class_reg_req_gp,
2736 &arm_class_reg_req_gp,
2737 &arm_class_reg_req_flags,
2753 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2754 int const n_res = 1;
2755 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2758 init_arm_attributes(res);
2759 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2760 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2761 out_infos[0].req = &arm_class_reg_req_gp;
2769 static arch_register_req_t
const *in_reqs[] = {
2770 &arm_class_reg_req_gp,
2771 &arm_class_reg_req_gp,
2772 &arm_class_reg_req_flags,
2788 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2789 int const n_res = 1;
2790 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2793 init_arm_attributes(res);
2794 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2795 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2796 out_infos[0].req = &arm_class_reg_req_gp;
2804 static arch_register_req_t
const *in_reqs[] = {
2805 &arm_class_reg_req_gp,
2806 &arm_class_reg_req_gp,
2807 &arm_class_reg_req_gp,
2808 &arm_class_reg_req_flags,
2825 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2826 int const n_res = 1;
2827 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2830 init_arm_attributes(res);
2831 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2832 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2833 out_infos[0].req = &arm_class_reg_req_gp;
2841 static arch_register_req_t
const *in_reqs[] = {
2842 &arm_class_reg_req_gp,
2856 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2857 irn_flags |= arch_irn_flag_rematerializable;
2858 int const n_res = 1;
2859 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2862 init_arm_attributes(res);
2863 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2864 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2865 out_infos[0].req = &arm_class_reg_req_gp;
2873 static arch_register_req_t
const *in_reqs[] = {
2874 &arm_class_reg_req_gp,
2875 &arm_class_reg_req_gp,
2890 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2891 irn_flags |= arch_irn_flag_rematerializable;
2892 int const n_res = 1;
2893 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2896 init_arm_attributes(res);
2897 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2898 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2899 out_infos[0].req = &arm_class_reg_req_gp;
2907 static arch_register_req_t
const *in_reqs[] = {
2908 &arm_class_reg_req_gp,
2909 &arm_class_reg_req_gp,
2924 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2925 irn_flags |= arch_irn_flag_rematerializable;
2926 int const n_res = 1;
2927 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2930 init_arm_attributes(res);
2931 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2932 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2933 out_infos[0].req = &arm_class_reg_req_gp;
2941 static arch_register_req_t
const *in_reqs[] = {
2942 &arm_class_reg_req_gp,
2943 &arm_class_reg_req_gp,
2944 &arm_class_reg_req_gp,
2960 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2961 irn_flags |= arch_irn_flag_rematerializable;
2962 int const n_res = 1;
2963 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2966 init_arm_attributes(res);
2967 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2968 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2969 out_infos[0].req = &arm_class_reg_req_gp;
2977 static arch_register_req_t
const *in_reqs[] = {
2978 &arm_class_reg_req_gp,
2992 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2993 irn_flags |= arch_irn_flag_modify_flags;
2994 irn_flags |= arch_irn_flag_rematerializable;
2995 int const n_res = 2;
2996 be_info_init_irn(res, irn_flags, in_reqs, n_res);
2999 init_arm_attributes(res);
3000 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3001 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3002 out_infos[0].req = &arm_class_reg_req_gp;
3003 out_infos[1].req = &arm_class_reg_req_flags;
3011 static arch_register_req_t
const *in_reqs[] = {
3012 &arm_class_reg_req_gp,
3013 &arm_class_reg_req_gp,
3028 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3029 irn_flags |= arch_irn_flag_modify_flags;
3030 irn_flags |= arch_irn_flag_rematerializable;
3031 int const n_res = 2;
3032 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3035 init_arm_attributes(res);
3036 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3037 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3038 out_infos[0].req = &arm_class_reg_req_gp;
3039 out_infos[1].req = &arm_class_reg_req_flags;
3047 static arch_register_req_t
const *in_reqs[] = {
3048 &arm_class_reg_req_gp,
3049 &arm_class_reg_req_gp,
3064 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3065 irn_flags |= arch_irn_flag_modify_flags;
3066 irn_flags |= arch_irn_flag_rematerializable;
3067 int const n_res = 2;
3068 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3071 init_arm_attributes(res);
3072 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3073 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3074 out_infos[0].req = &arm_class_reg_req_gp;
3075 out_infos[1].req = &arm_class_reg_req_flags;
3083 static arch_register_req_t
const *in_reqs[] = {
3084 &arm_class_reg_req_gp,
3085 &arm_class_reg_req_gp,
3086 &arm_class_reg_req_gp,
3102 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3103 irn_flags |= arch_irn_flag_modify_flags;
3104 irn_flags |= arch_irn_flag_rematerializable;
3105 int const n_res = 2;
3106 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3109 init_arm_attributes(res);
3110 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3111 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3112 out_infos[0].req = &arm_class_reg_req_gp;
3113 out_infos[1].req = &arm_class_reg_req_flags;
3121 static arch_register_req_t
const *in_reqs[] = {
3122 &arm_class_reg_req_gp,
3123 &arm_class_reg_req_gp,
3138 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3139 irn_flags |= arch_irn_flag_rematerializable;
3140 int const n_res = 2;
3141 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3144 init_arm_attributes(res);
3145 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3146 out_infos[0].req = &arm_class_reg_req_gp;
3147 out_infos[1].req = &arm_class_reg_req_gp;
3173 static arch_register_req_t
const *in_reqs[] = {
3174 &arm_class_reg_req_gp,
3175 &arm_class_reg_req_flags,
3190 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3191 int const n_res = 1;
3192 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3195 init_arm_attributes(res);
3196 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3197 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3198 out_infos[0].req = &arm_class_reg_req_gp;
3206 static arch_register_req_t
const *in_reqs[] = {
3207 &arm_class_reg_req_gp,
3208 &arm_class_reg_req_gp,
3209 &arm_class_reg_req_flags,
3225 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3226 int const n_res = 1;
3227 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3230 init_arm_attributes(res);
3231 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3232 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3233 out_infos[0].req = &arm_class_reg_req_gp;
3241 static arch_register_req_t
const *in_reqs[] = {
3242 &arm_class_reg_req_gp,
3243 &arm_class_reg_req_gp,
3244 &arm_class_reg_req_flags,
3260 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3261 int const n_res = 1;
3262 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3265 init_arm_attributes(res);
3266 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3267 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3268 out_infos[0].req = &arm_class_reg_req_gp;
3276 static arch_register_req_t
const *in_reqs[] = {
3277 &arm_class_reg_req_gp,
3278 &arm_class_reg_req_gp,
3279 &arm_class_reg_req_gp,
3280 &arm_class_reg_req_flags,
3297 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3298 int const n_res = 1;
3299 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3302 init_arm_attributes(res);
3303 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3304 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3305 out_infos[0].req = &arm_class_reg_req_gp;
3332 static arch_register_req_t
const *in_reqs[] = {
3333 &arm_class_reg_req_gp,
3334 &arm_class_reg_req_fpa,
3335 &arch_memory_requirement,
3351 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3352 int const n_res = 1;
3353 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3356 init_arm_attributes(res);
3357 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
3358 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3359 out_infos[0].req = &arch_memory_requirement;
3367 static arch_register_req_t
const *in_reqs[] = {
3368 &arm_class_reg_req_gp,
3369 &arm_class_reg_req_gp,
3370 &arch_memory_requirement,
3386 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3387 int const n_res = 1;
3388 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3391 init_arm_attributes(res);
3392 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
3393 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3394 out_infos[0].req = &arch_memory_requirement;
3402 static arch_register_req_t
const *in_reqs[] = {
3403 &arm_class_reg_req_gp,
3417 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3418 irn_flags |= arch_irn_flag_rematerializable;
3419 int const n_res = 1;
3420 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3423 init_arm_attributes(res);
3424 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3425 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3426 out_infos[0].req = &arm_class_reg_req_gp;
3434 static arch_register_req_t
const *in_reqs[] = {
3435 &arm_class_reg_req_gp,
3436 &arm_class_reg_req_gp,
3451 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3452 irn_flags |= arch_irn_flag_rematerializable;
3453 int const n_res = 1;
3454 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3457 init_arm_attributes(res);
3458 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3459 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3460 out_infos[0].req = &arm_class_reg_req_gp;
3468 static arch_register_req_t
const *in_reqs[] = {
3469 &arm_class_reg_req_gp,
3470 &arm_class_reg_req_gp,
3485 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3486 irn_flags |= arch_irn_flag_rematerializable;
3487 int const n_res = 1;
3488 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3491 init_arm_attributes(res);
3492 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3493 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3494 out_infos[0].req = &arm_class_reg_req_gp;
3502 static arch_register_req_t
const *in_reqs[] = {
3503 &arm_class_reg_req_gp,
3504 &arm_class_reg_req_gp,
3505 &arm_class_reg_req_gp,
3521 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3522 irn_flags |= arch_irn_flag_rematerializable;
3523 int const n_res = 1;
3524 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3527 init_arm_attributes(res);
3528 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3529 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3530 out_infos[0].req = &arm_class_reg_req_gp;
3538 static arch_register_req_t
const *in_reqs[] = {
3539 &arm_class_reg_req_gp,
3553 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3554 irn_flags |= arch_irn_flag_modify_flags;
3555 irn_flags |= arch_irn_flag_rematerializable;
3556 int const n_res = 2;
3557 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3560 init_arm_attributes(res);
3561 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3562 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3563 out_infos[0].req = &arm_class_reg_req_gp;
3564 out_infos[1].req = &arm_class_reg_req_flags;
3572 static arch_register_req_t
const *in_reqs[] = {
3573 &arm_class_reg_req_gp,
3574 &arm_class_reg_req_gp,
3589 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3590 irn_flags |= arch_irn_flag_modify_flags;
3591 irn_flags |= arch_irn_flag_rematerializable;
3592 int const n_res = 2;
3593 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3596 init_arm_attributes(res);
3597 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3598 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3599 out_infos[0].req = &arm_class_reg_req_gp;
3600 out_infos[1].req = &arm_class_reg_req_flags;
3608 static arch_register_req_t
const *in_reqs[] = {
3609 &arm_class_reg_req_gp,
3610 &arm_class_reg_req_gp,
3625 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3626 irn_flags |= arch_irn_flag_modify_flags;
3627 irn_flags |= arch_irn_flag_rematerializable;
3628 int const n_res = 2;
3629 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3632 init_arm_attributes(res);
3633 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3634 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3635 out_infos[0].req = &arm_class_reg_req_gp;
3636 out_infos[1].req = &arm_class_reg_req_flags;
3644 static arch_register_req_t
const *in_reqs[] = {
3645 &arm_class_reg_req_gp,
3646 &arm_class_reg_req_gp,
3647 &arm_class_reg_req_gp,
3663 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3664 irn_flags |= arch_irn_flag_modify_flags;
3665 irn_flags |= arch_irn_flag_rematerializable;
3666 int const n_res = 2;
3667 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3670 init_arm_attributes(res);
3671 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3672 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3673 out_infos[0].req = &arm_class_reg_req_gp;
3674 out_infos[1].req = &arm_class_reg_req_flags;
3700 static arch_register_req_t
const *in_reqs[] = {
3701 &arm_class_reg_req_fpa,
3702 &arm_class_reg_req_fpa,
3717 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3718 irn_flags |= arch_irn_flag_rematerializable;
3719 int const n_res = 1;
3720 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3723 init_arm_attributes(res);
3724 init_arm_farith_attributes(res, op_mode);
3725 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3726 out_infos[0].req = &arm_class_reg_req_fpa;
3734 static arch_register_req_t
const *in_reqs[] = {
3735 &arm_class_reg_req_gp,
3749 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3750 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3753 init_arm_attributes(res);
3754 be_switch_attr_init(res, &attr->swtch, table, NULL);
3760 ir_node *new_bd_arm_Tst_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
unsigned char immediate_value,
unsigned char immediate_rot,
bool ins_permuted,
bool is_unsigned)
3762 static arch_register_req_t
const *in_reqs[] = {
3763 &arm_class_reg_req_gp,
3772 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 1, in);
3777 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3778 irn_flags |= arch_irn_flag_rematerializable;
3779 irn_flags |= arch_irn_flag_modify_flags;
3780 int const n_res = 1;
3781 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3784 init_arm_attributes(res);
3785 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3786 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3788 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3789 out_infos[0].req = &arm_class_reg_req_flags;
3797 static arch_register_req_t
const *in_reqs[] = {
3798 &arm_class_reg_req_gp,
3799 &arm_class_reg_req_gp,
3809 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 2, in);
3814 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3815 irn_flags |= arch_irn_flag_rematerializable;
3816 irn_flags |= arch_irn_flag_modify_flags;
3817 int const n_res = 1;
3818 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3821 init_arm_attributes(res);
3822 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3823 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3825 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3826 out_infos[0].req = &arm_class_reg_req_flags;
3832 ir_node *new_bd_arm_Tst_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
ir_node *right, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate,
bool ins_permuted,
bool is_unsigned)
3834 static arch_register_req_t
const *in_reqs[] = {
3835 &arm_class_reg_req_gp,
3836 &arm_class_reg_req_gp,
3846 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 2, in);
3851 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3852 irn_flags |= arch_irn_flag_rematerializable;
3853 irn_flags |= arch_irn_flag_modify_flags;
3854 int const n_res = 1;
3855 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3858 init_arm_attributes(res);
3859 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3860 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3862 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3863 out_infos[0].req = &arm_class_reg_req_flags;
3871 static arch_register_req_t
const *in_reqs[] = {
3872 &arm_class_reg_req_gp,
3873 &arm_class_reg_req_gp,
3874 &arm_class_reg_req_gp,
3885 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 3, in);
3890 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3891 irn_flags |= arch_irn_flag_rematerializable;
3892 irn_flags |= arch_irn_flag_modify_flags;
3893 int const n_res = 1;
3894 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3897 init_arm_attributes(res);
3898 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3899 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3901 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3902 out_infos[0].req = &arm_class_reg_req_flags;
3910 static arch_register_req_t
const *in_reqs[] = {
3911 &arm_class_reg_req_gp,
3912 &arm_class_reg_req_gp,
3927 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3928 irn_flags |= arch_irn_flag_rematerializable;
3929 int const n_res = 2;
3930 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3933 init_arm_attributes(res);
3934 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3935 out_infos[0].req = &arm_class_reg_req_gp;
3936 out_infos[1].req = &arm_class_reg_req_gp;
3962 arch_register_req_t
const **
const in_reqs = NULL;
3971 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3972 irn_flags |= arch_irn_flag_rematerializable;
3973 int const n_res = 1;
3974 be_info_init_irn(res, irn_flags, in_reqs, n_res);
3977 init_arm_attributes(res);
3979 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3980 out_infos[0].req = &arm_class_reg_req_fpa;
3991 void arm_create_opcodes(
void)
3996 arm_opcode_start = cur_opcode;
4001 set_op_tag(op, arm_op_tag);
4005 set_op_tag(op, arm_op_tag);
4011 set_op_tag(op, arm_op_tag);
4017 set_op_tag(op, arm_op_tag);
4021 set_op_tag(op, arm_op_tag);
4027 set_op_tag(op, arm_op_tag);
4028 op_arm_Address = op;
4033 set_op_tag(op, arm_op_tag);
4039 set_op_tag(op, arm_op_tag);
4045 set_op_tag(op, arm_op_tag);
4051 set_op_tag(op, arm_op_tag);
4057 set_op_tag(op, arm_op_tag);
4063 set_op_tag(op, arm_op_tag);
4069 set_op_tag(op, arm_op_tag);
4075 set_op_tag(op, arm_op_tag);
4081 set_op_tag(op, arm_op_tag);
4087 set_op_tag(op, arm_op_tag);
4093 set_op_tag(op, arm_op_tag);
4099 set_op_tag(op, arm_op_tag);
4105 set_op_tag(op, arm_op_tag);
4111 set_op_tag(op, arm_op_tag);
4112 op_arm_FrameAddr = op;
4117 set_op_tag(op, arm_op_tag);
4123 set_op_tag(op, arm_op_tag);
4129 set_op_tag(op, arm_op_tag);
4135 set_op_tag(op, arm_op_tag);
4136 op_arm_LinkLdrPC = op;
4141 set_op_tag(op, arm_op_tag);
4142 op_arm_LinkMovPC = op;
4147 set_op_tag(op, arm_op_tag);
4153 set_op_tag(op, arm_op_tag);
4159 set_op_tag(op, arm_op_tag);
4165 set_op_tag(op, arm_op_tag);
4171 set_op_tag(op, arm_op_tag);
4177 set_op_tag(op, arm_op_tag);
4183 set_op_tag(op, arm_op_tag);
4187 set_op_tag(op, arm_op_tag);
4193 set_op_tag(op, arm_op_tag);
4199 set_op_tag(op, arm_op_tag);
4205 set_op_tag(op, arm_op_tag);
4211 set_op_tag(op, arm_op_tag);
4217 set_op_tag(op, arm_op_tag);
4223 set_op_tag(op, arm_op_tag);
4229 set_op_tag(op, arm_op_tag);
4235 set_op_tag(op, arm_op_tag);
4241 set_op_tag(op, arm_op_tag);
4245 set_op_tag(op, arm_op_tag);
4246 op_arm_SMulL_t = op;
4251 set_op_tag(op, arm_op_tag);
4255 set_op_tag(op, arm_op_tag);
4261 set_op_tag(op, arm_op_tag);
4267 set_op_tag(op, arm_op_tag);
4273 set_op_tag(op, arm_op_tag);
4279 set_op_tag(op, arm_op_tag);
4283 set_op_tag(op, arm_op_tag);
4289 set_op_tag(op, arm_op_tag);
4295 set_op_tag(op, arm_op_tag);
4296 op_arm_SwitchJmp = op;
4301 set_op_tag(op, arm_op_tag);
4307 set_op_tag(op, arm_op_tag);
4311 set_op_tag(op, arm_op_tag);
4312 op_arm_UMulL_t = op;
4317 set_op_tag(op, arm_op_tag);
4322 void arm_free_opcodes(
void)
4325 free_ir_op(op_arm_AdC_t); op_arm_AdC_t = NULL;
4328 free_ir_op(op_arm_AddS_t); op_arm_AddS_t = NULL;
4329 free_ir_op(op_arm_Address); op_arm_Address = NULL;
4343 free_ir_op(op_arm_FrameAddr); op_arm_FrameAddr = NULL;
4347 free_ir_op(op_arm_LinkLdrPC); op_arm_LinkLdrPC = NULL;
4348 free_ir_op(op_arm_LinkMovPC); op_arm_LinkMovPC = NULL;
4356 free_ir_op(op_arm_OrPl_t); op_arm_OrPl_t = NULL;
4358 free_ir_op(op_arm_OrrPl); op_arm_OrrPl = NULL;
4359 free_ir_op(op_arm_Pkhbt); op_arm_Pkhbt = NULL;
4360 free_ir_op(op_arm_Pkhtb); op_arm_Pkhtb = NULL;
4361 free_ir_op(op_arm_Return); op_arm_Return = NULL;
4365 free_ir_op(op_arm_SMulL); op_arm_SMulL = NULL;
4366 free_ir_op(op_arm_SMulL_t); op_arm_SMulL_t = NULL;
4368 free_ir_op(op_arm_SbC_t); op_arm_SbC_t = NULL;
4373 free_ir_op(op_arm_SubS_t); op_arm_SubS_t = NULL;
4375 free_ir_op(op_arm_SwitchJmp); op_arm_SwitchJmp = NULL;
4377 free_ir_op(op_arm_UMulL); op_arm_UMulL = NULL;
4378 free_ir_op(op_arm_UMulL_t); op_arm_UMulL_t = NULL;
4379 free_ir_op(op_arm_fConst); op_arm_fConst = NULL;
void set_op_dump(ir_op *op, dump_node_func func)
Sets dump callback func for operation op.
void * get_irn_generic_attr(ir_node *node)
Returns a pointer to the node attributes.
ir_mode * mode_X
execution
unsigned get_next_ir_opcodes(unsigned num)
Returns the next free n IR opcode number, allows to register a bunch of user ops. ...
void set_op_attrs_equal(ir_op *op, node_attrs_equal_func func)
Sets attrs_equal callback func for operation op.
ir_op * new_ir_op(unsigned code, const char *name, op_pin_state p, irop_flags flags, op_arity opar, int op_index, size_t attr_size)
Creates a new IR operation.
Nodes of this opcode can be placed in any basic block.
struct ir_graph ir_graph
Procedure Graph.
struct dbg_info dbg_info
Source Reference.
struct ir_node ir_node
Procedure Graph Node.
ir_mode * mode_F
ieee754 binary32 float (single precision)
Forking control flow at this operation.
struct ir_mode ir_mode
SSA Value mode.
ir_node * new_ir_node(dbg_info *db, ir_graph *irg, ir_node *block, ir_op *op, ir_mode *mode, int arity, ir_node *const *in)
IR node constructor.
This operation is a control flow operation.
unsigned get_irn_opcode(const ir_node *node)
Returns the opcode-enum of the node.
struct ir_switch_table ir_switch_table
A switch table mapping integer numbers to proj-numbers of a Switch-node.
struct ir_entity ir_entity
Entity.
ir_graph * get_irn_irg(const ir_node *node)
Returns the ir_graph this node belongs to.
Node must remain in this basic block if it can throw an exception, else can float.
ir_op * get_irn_op(const ir_node *node)
Returns the opcode struct of the node.
void ir_op_set_memory_index(ir_op *op, int memory_index)
Sets memory input of operation using memory.
struct ir_op ir_op
Node Opcode.
ir_node * optimize_node(ir_node *n)
Applies local optimizations to a single node.
void free_ir_op(ir_op *code)
Frees an ir operation.
Nodes must remain in this basic block.
ir_mode * mode_T
tuple (none)
This operation has no arguments and is some kind of a constant.
struct ir_tarval ir_tarval
Target Machine Value.
void verify_new_node(ir_node *node)
If firm is built in debug mode, verify that a newly created node is fine.
void set_op_copy_attr(ir_op *op, copy_attr_func func)
Sets attribute copy callback func for operation op.
ir_relation
Relations for comparing numbers.
This operation has a memory input and may change the memory state.
Any other arity, either fixed for the opcode or known when creating the node.