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gen_arm_new_nodes.c
1 #include "gen_arm_new_nodes.h"
2 
3 #include "benode.h"
4 #include "arm_bearch_t.h"
5 #include "gen_arm_regalloc_if.h"
6 #include "arm_new_nodes_t.h"
7 #include "fourcc.h"
8 #include "irgopt.h"
9 #include "ircons_t.h"
10 
11 ir_op *op_arm_AdC = NULL;
12 ir_op *op_arm_AdC_t = NULL;
13 ir_op *op_arm_Add = NULL;
14 ir_op *op_arm_AddS = NULL;
15 ir_op *op_arm_AddS_t = NULL;
16 ir_op *op_arm_Address = NULL;
17 ir_op *op_arm_Adf = NULL;
18 ir_op *op_arm_And = NULL;
19 ir_op *op_arm_B = NULL;
20 ir_op *op_arm_Bcc = NULL;
21 ir_op *op_arm_Bic = NULL;
22 ir_op *op_arm_Bl = NULL;
23 ir_op *op_arm_Clz = NULL;
24 ir_op *op_arm_Cmfe = NULL;
25 ir_op *op_arm_Cmn = NULL;
26 ir_op *op_arm_Cmp = NULL;
27 ir_op *op_arm_Dvf = NULL;
28 ir_op *op_arm_Eor = NULL;
29 ir_op *op_arm_Flt = NULL;
30 ir_op *op_arm_FrameAddr = NULL;
31 ir_op *op_arm_IJmp = NULL;
32 ir_op *op_arm_Ldf = NULL;
33 ir_op *op_arm_Ldr = NULL;
34 ir_op *op_arm_LinkLdrPC = NULL;
35 ir_op *op_arm_LinkMovPC = NULL;
36 ir_op *op_arm_Mla = NULL;
37 ir_op *op_arm_Mls = NULL;
38 ir_op *op_arm_Mov = NULL;
39 ir_op *op_arm_Muf = NULL;
40 ir_op *op_arm_Mul = NULL;
41 ir_op *op_arm_Mvf = NULL;
42 ir_op *op_arm_Mvn = NULL;
43 ir_op *op_arm_OrPl_t = NULL;
44 ir_op *op_arm_Orr = NULL;
45 ir_op *op_arm_OrrPl = NULL;
46 ir_op *op_arm_Pkhbt = NULL;
47 ir_op *op_arm_Pkhtb = NULL;
48 ir_op *op_arm_Return = NULL;
49 ir_op *op_arm_RsC = NULL;
50 ir_op *op_arm_Rsb = NULL;
51 ir_op *op_arm_RsbS = NULL;
52 ir_op *op_arm_SMulL = NULL;
53 ir_op *op_arm_SMulL_t = NULL;
54 ir_op *op_arm_SbC = NULL;
55 ir_op *op_arm_SbC_t = NULL;
56 ir_op *op_arm_Stf = NULL;
57 ir_op *op_arm_Str = NULL;
58 ir_op *op_arm_Sub = NULL;
59 ir_op *op_arm_SubS = NULL;
60 ir_op *op_arm_SubS_t = NULL;
61 ir_op *op_arm_Suf = NULL;
62 ir_op *op_arm_SwitchJmp = NULL;
63 ir_op *op_arm_Tst = NULL;
64 ir_op *op_arm_UMulL = NULL;
65 ir_op *op_arm_UMulL_t = NULL;
66 ir_op *op_arm_fConst = NULL;
67 
68 
69 static int arm_opcode_start = -1;
70 
72 #define arm_op_tag FOURCC('a', 'r', 'm', '\0')
73 
75 int is_arm_op(const ir_op *op)
76 {
77  return get_op_tag(op) == arm_op_tag;
78 }
79 
81 int is_arm_irn(const ir_node *node)
82 {
83  return is_arm_op(get_irn_op(node));
84 }
85 
86 int get_arm_irn_opcode(const ir_node *node)
87 {
88  assert(is_arm_irn(node));
89  return get_irn_opcode(node) - arm_opcode_start;
90 }
91 
92 #undef BIT
93 #define BIT(x) (1 << (x))
94 
95 
96 static const arch_register_req_t arm_requirements_gp_not_in_r0 = {
97  .cls = &arm_reg_classes[CLASS_arm_gp],
98  .limited = NULL,
99  .should_be_same = 0,
100  .must_be_different = 1,
101  .width = 1,
102 };
103 
104 static const arch_register_req_t arm_requirements_gp_in_r2_not_in_r0_not_in_r3 = {
105  .cls = &arm_reg_classes[CLASS_arm_gp],
106  .limited = NULL,
107  .should_be_same = 4,
108  .must_be_different = 9,
109  .width = 1,
110 };
111 
112 
113 
114 ir_node *new_bd_arm_AdC_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *flags, unsigned char immediate_value, unsigned char immediate_rot)
115 {
116  static arch_register_req_t const *in_reqs[] = {
117  &arm_class_reg_req_gp,
118  &arm_class_reg_req_flags,
119  };
120 
121  /* construct in array */
122  ir_node *const in[] = {
123  left,
124  flags,
125  };
126 
127  ir_graph *const irg = get_irn_irg(block);
128  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC, arm_mode_gp, 2, in);
129 
130  /* init node attributes */
131 
132  /* flags */
133  arch_irn_flags_t irn_flags = arch_irn_flags_none;
134  int const n_res = 1;
135  be_info_init_irn(res, irn_flags, in_reqs, n_res);
136  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
137  (void)attr; /* avoid potential warning */
138  init_arm_attributes(res);
139  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
140  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
141  out_infos[0].req = &arm_class_reg_req_gp;
142 
143  verify_new_node(res);
144  return optimize_node(res);
145 }
146 
147 ir_node *new_bd_arm_AdC_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags)
148 {
149  static arch_register_req_t const *in_reqs[] = {
150  &arm_class_reg_req_gp,
151  &arm_class_reg_req_gp,
152  &arm_class_reg_req_flags,
153  };
154 
155  /* construct in array */
156  ir_node *const in[] = {
157  left,
158  right,
159  flags,
160  };
161 
162  ir_graph *const irg = get_irn_irg(block);
163  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC, arm_mode_gp, 3, in);
164 
165  /* init node attributes */
166 
167  /* flags */
168  arch_irn_flags_t irn_flags = arch_irn_flags_none;
169  int const n_res = 1;
170  be_info_init_irn(res, irn_flags, in_reqs, n_res);
171  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
172  (void)attr; /* avoid potential warning */
173  init_arm_attributes(res);
174  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
175  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
176  out_infos[0].req = &arm_class_reg_req_gp;
177 
178  verify_new_node(res);
179  return optimize_node(res);
180 }
181 
182 ir_node *new_bd_arm_AdC_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
183 {
184  static arch_register_req_t const *in_reqs[] = {
185  &arm_class_reg_req_gp,
186  &arm_class_reg_req_gp,
187  &arm_class_reg_req_flags,
188  };
189 
190  /* construct in array */
191  ir_node *const in[] = {
192  left,
193  right,
194  flags,
195  };
196 
197  ir_graph *const irg = get_irn_irg(block);
198  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC, arm_mode_gp, 3, in);
199 
200  /* init node attributes */
201 
202  /* flags */
203  arch_irn_flags_t irn_flags = arch_irn_flags_none;
204  int const n_res = 1;
205  be_info_init_irn(res, irn_flags, in_reqs, n_res);
206  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
207  (void)attr; /* avoid potential warning */
208  init_arm_attributes(res);
209  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
210  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
211  out_infos[0].req = &arm_class_reg_req_gp;
212 
213  verify_new_node(res);
214  return optimize_node(res);
215 }
216 
217 ir_node *new_bd_arm_AdC_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, ir_node *flags, arm_shift_modifier_t shift_modifier)
218 {
219  static arch_register_req_t const *in_reqs[] = {
220  &arm_class_reg_req_gp,
221  &arm_class_reg_req_gp,
222  &arm_class_reg_req_gp,
223  &arm_class_reg_req_flags,
224  };
225 
226  /* construct in array */
227  ir_node *const in[] = {
228  left,
229  right,
230  shift,
231  flags,
232  };
233 
234  ir_graph *const irg = get_irn_irg(block);
235  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC, arm_mode_gp, 4, in);
236 
237  /* init node attributes */
238 
239  /* flags */
240  arch_irn_flags_t irn_flags = arch_irn_flags_none;
241  int const n_res = 1;
242  be_info_init_irn(res, irn_flags, in_reqs, n_res);
243  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
244  (void)attr; /* avoid potential warning */
245  init_arm_attributes(res);
246  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
247  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
248  out_infos[0].req = &arm_class_reg_req_gp;
249 
250  verify_new_node(res);
251  return optimize_node(res);
252 }
253 
254 ir_node *new_bd_arm_AdC_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, ir_mode *mode)
255 {
256 
257  /* construct in array */
258  ir_node *const in[] = {
259  left,
260  right,
261  flags,
262  };
263 
264  ir_graph *const irg = get_irn_irg(block);
265  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC_t, mode, 3, in);
266 
267  /* init node attributes */
268 
269  verify_new_node(res);
270  return optimize_node(res);
271 }
272 
273 ir_node *new_bd_arm_Add_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
274 {
275  static arch_register_req_t const *in_reqs[] = {
276  &arm_class_reg_req_gp,
277  };
278 
279  /* construct in array */
280  ir_node *const in[] = {
281  left,
282  };
283 
284  ir_graph *const irg = get_irn_irg(block);
285  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Add, arm_mode_gp, 1, in);
286 
287  /* init node attributes */
288 
289  /* flags */
290  arch_irn_flags_t irn_flags = arch_irn_flags_none;
291  irn_flags |= arch_irn_flag_rematerializable;
292  int const n_res = 1;
293  be_info_init_irn(res, irn_flags, in_reqs, n_res);
294  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
295  (void)attr; /* avoid potential warning */
296  init_arm_attributes(res);
297  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
298  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
299  out_infos[0].req = &arm_class_reg_req_gp;
300 
301  verify_new_node(res);
302  return optimize_node(res);
303 }
304 
305 ir_node *new_bd_arm_Add_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
306 {
307  static arch_register_req_t const *in_reqs[] = {
308  &arm_class_reg_req_gp,
309  &arm_class_reg_req_gp,
310  };
311 
312  /* construct in array */
313  ir_node *const in[] = {
314  left,
315  right,
316  };
317 
318  ir_graph *const irg = get_irn_irg(block);
319  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Add, arm_mode_gp, 2, in);
320 
321  /* init node attributes */
322 
323  /* flags */
324  arch_irn_flags_t irn_flags = arch_irn_flags_none;
325  irn_flags |= arch_irn_flag_rematerializable;
326  int const n_res = 1;
327  be_info_init_irn(res, irn_flags, in_reqs, n_res);
328  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
329  (void)attr; /* avoid potential warning */
330  init_arm_attributes(res);
331  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
332  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
333  out_infos[0].req = &arm_class_reg_req_gp;
334 
335  verify_new_node(res);
336  return optimize_node(res);
337 }
338 
339 ir_node *new_bd_arm_Add_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
340 {
341  static arch_register_req_t const *in_reqs[] = {
342  &arm_class_reg_req_gp,
343  &arm_class_reg_req_gp,
344  };
345 
346  /* construct in array */
347  ir_node *const in[] = {
348  left,
349  right,
350  };
351 
352  ir_graph *const irg = get_irn_irg(block);
353  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Add, arm_mode_gp, 2, in);
354 
355  /* init node attributes */
356 
357  /* flags */
358  arch_irn_flags_t irn_flags = arch_irn_flags_none;
359  irn_flags |= arch_irn_flag_rematerializable;
360  int const n_res = 1;
361  be_info_init_irn(res, irn_flags, in_reqs, n_res);
362  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
363  (void)attr; /* avoid potential warning */
364  init_arm_attributes(res);
365  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
366  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
367  out_infos[0].req = &arm_class_reg_req_gp;
368 
369  verify_new_node(res);
370  return optimize_node(res);
371 }
372 
373 ir_node *new_bd_arm_Add_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
374 {
375  static arch_register_req_t const *in_reqs[] = {
376  &arm_class_reg_req_gp,
377  &arm_class_reg_req_gp,
378  &arm_class_reg_req_gp,
379  };
380 
381  /* construct in array */
382  ir_node *const in[] = {
383  left,
384  right,
385  shift,
386  };
387 
388  ir_graph *const irg = get_irn_irg(block);
389  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Add, arm_mode_gp, 3, in);
390 
391  /* init node attributes */
392 
393  /* flags */
394  arch_irn_flags_t irn_flags = arch_irn_flags_none;
395  irn_flags |= arch_irn_flag_rematerializable;
396  int const n_res = 1;
397  be_info_init_irn(res, irn_flags, in_reqs, n_res);
398  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
399  (void)attr; /* avoid potential warning */
400  init_arm_attributes(res);
401  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
402  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
403  out_infos[0].req = &arm_class_reg_req_gp;
404 
405  verify_new_node(res);
406  return optimize_node(res);
407 }
408 
409 ir_node *new_bd_arm_AddS_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
410 {
411  static arch_register_req_t const *in_reqs[] = {
412  &arm_class_reg_req_gp,
413  };
414 
415  /* construct in array */
416  ir_node *const in[] = {
417  left,
418  };
419 
420  ir_graph *const irg = get_irn_irg(block);
421  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS, mode_T, 1, in);
422 
423  /* init node attributes */
424 
425  /* flags */
426  arch_irn_flags_t irn_flags = arch_irn_flags_none;
427  irn_flags |= arch_irn_flag_modify_flags;
428  irn_flags |= arch_irn_flag_rematerializable;
429  int const n_res = 2;
430  be_info_init_irn(res, irn_flags, in_reqs, n_res);
431  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
432  (void)attr; /* avoid potential warning */
433  init_arm_attributes(res);
434  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
435  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
436  out_infos[0].req = &arm_class_reg_req_gp;
437  out_infos[1].req = &arm_class_reg_req_flags;
438 
439  verify_new_node(res);
440  return optimize_node(res);
441 }
442 
443 ir_node *new_bd_arm_AddS_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
444 {
445  static arch_register_req_t const *in_reqs[] = {
446  &arm_class_reg_req_gp,
447  &arm_class_reg_req_gp,
448  };
449 
450  /* construct in array */
451  ir_node *const in[] = {
452  left,
453  right,
454  };
455 
456  ir_graph *const irg = get_irn_irg(block);
457  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS, mode_T, 2, in);
458 
459  /* init node attributes */
460 
461  /* flags */
462  arch_irn_flags_t irn_flags = arch_irn_flags_none;
463  irn_flags |= arch_irn_flag_modify_flags;
464  irn_flags |= arch_irn_flag_rematerializable;
465  int const n_res = 2;
466  be_info_init_irn(res, irn_flags, in_reqs, n_res);
467  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
468  (void)attr; /* avoid potential warning */
469  init_arm_attributes(res);
470  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
471  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
472  out_infos[0].req = &arm_class_reg_req_gp;
473  out_infos[1].req = &arm_class_reg_req_flags;
474 
475  verify_new_node(res);
476  return optimize_node(res);
477 }
478 
479 ir_node *new_bd_arm_AddS_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
480 {
481  static arch_register_req_t const *in_reqs[] = {
482  &arm_class_reg_req_gp,
483  &arm_class_reg_req_gp,
484  };
485 
486  /* construct in array */
487  ir_node *const in[] = {
488  left,
489  right,
490  };
491 
492  ir_graph *const irg = get_irn_irg(block);
493  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS, mode_T, 2, in);
494 
495  /* init node attributes */
496 
497  /* flags */
498  arch_irn_flags_t irn_flags = arch_irn_flags_none;
499  irn_flags |= arch_irn_flag_modify_flags;
500  irn_flags |= arch_irn_flag_rematerializable;
501  int const n_res = 2;
502  be_info_init_irn(res, irn_flags, in_reqs, n_res);
503  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
504  (void)attr; /* avoid potential warning */
505  init_arm_attributes(res);
506  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
507  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
508  out_infos[0].req = &arm_class_reg_req_gp;
509  out_infos[1].req = &arm_class_reg_req_flags;
510 
511  verify_new_node(res);
512  return optimize_node(res);
513 }
514 
515 ir_node *new_bd_arm_AddS_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
516 {
517  static arch_register_req_t const *in_reqs[] = {
518  &arm_class_reg_req_gp,
519  &arm_class_reg_req_gp,
520  &arm_class_reg_req_gp,
521  };
522 
523  /* construct in array */
524  ir_node *const in[] = {
525  left,
526  right,
527  shift,
528  };
529 
530  ir_graph *const irg = get_irn_irg(block);
531  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS, mode_T, 3, in);
532 
533  /* init node attributes */
534 
535  /* flags */
536  arch_irn_flags_t irn_flags = arch_irn_flags_none;
537  irn_flags |= arch_irn_flag_modify_flags;
538  irn_flags |= arch_irn_flag_rematerializable;
539  int const n_res = 2;
540  be_info_init_irn(res, irn_flags, in_reqs, n_res);
541  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
542  (void)attr; /* avoid potential warning */
543  init_arm_attributes(res);
544  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
545  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
546  out_infos[0].req = &arm_class_reg_req_gp;
547  out_infos[1].req = &arm_class_reg_req_flags;
548 
549  verify_new_node(res);
550  return optimize_node(res);
551 }
552 
553 ir_node *new_bd_arm_AddS_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
554 {
555 
556  /* construct in array */
557  ir_node *const in[] = {
558  left,
559  right,
560  };
561 
562  ir_graph *const irg = get_irn_irg(block);
563  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS_t, mode_T, 2, in);
564 
565  /* init node attributes */
566 
567  verify_new_node(res);
568  return optimize_node(res);
569 }
570 
571 ir_node *new_bd_arm_Address(dbg_info *dbgi, ir_node *block, ir_entity *entity, int offset)
572 {
573  arch_register_req_t const **const in_reqs = NULL;
574 
575 
576  ir_graph *const irg = get_irn_irg(block);
577  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Address, arm_mode_gp, 0, NULL);
578 
579  /* init node attributes */
580 
581  /* flags */
582  arch_irn_flags_t irn_flags = arch_irn_flags_none;
583  irn_flags |= arch_irn_flag_rematerializable;
584  int const n_res = 1;
585  be_info_init_irn(res, irn_flags, in_reqs, n_res);
586  arm_Address_attr_t *const attr = (arm_Address_attr_t*)get_irn_generic_attr(res);
587  (void)attr; /* avoid potential warning */
588  init_arm_attributes(res);
589  init_arm_Address_attributes(res, entity, offset);
590  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
591  out_infos[0].req = &arm_class_reg_req_gp;
592 
593  verify_new_node(res);
594  return optimize_node(res);
595 }
596 
597 ir_node *new_bd_arm_Adf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode)
598 {
599  static arch_register_req_t const *in_reqs[] = {
600  &arm_class_reg_req_fpa,
601  &arm_class_reg_req_fpa,
602  };
603 
604  /* construct in array */
605  ir_node *const in[] = {
606  op0,
607  op1,
608  };
609 
610  ir_graph *const irg = get_irn_irg(block);
611  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Adf, mode_F, 2, in);
612 
613  /* init node attributes */
614 
615  /* flags */
616  arch_irn_flags_t irn_flags = arch_irn_flags_none;
617  irn_flags |= arch_irn_flag_rematerializable;
618  int const n_res = 1;
619  be_info_init_irn(res, irn_flags, in_reqs, n_res);
620  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
621  (void)attr; /* avoid potential warning */
622  init_arm_attributes(res);
623  init_arm_farith_attributes(res, op_mode);
624  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
625  out_infos[0].req = &arm_class_reg_req_fpa;
626 
627  verify_new_node(res);
628  return optimize_node(res);
629 }
630 
631 ir_node *new_bd_arm_And_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
632 {
633  static arch_register_req_t const *in_reqs[] = {
634  &arm_class_reg_req_gp,
635  };
636 
637  /* construct in array */
638  ir_node *const in[] = {
639  left,
640  };
641 
642  ir_graph *const irg = get_irn_irg(block);
643  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_And, arm_mode_gp, 1, in);
644 
645  /* init node attributes */
646 
647  /* flags */
648  arch_irn_flags_t irn_flags = arch_irn_flags_none;
649  irn_flags |= arch_irn_flag_rematerializable;
650  int const n_res = 1;
651  be_info_init_irn(res, irn_flags, in_reqs, n_res);
652  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
653  (void)attr; /* avoid potential warning */
654  init_arm_attributes(res);
655  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
656  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
657  out_infos[0].req = &arm_class_reg_req_gp;
658 
659  verify_new_node(res);
660  return optimize_node(res);
661 }
662 
663 ir_node *new_bd_arm_And_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
664 {
665  static arch_register_req_t const *in_reqs[] = {
666  &arm_class_reg_req_gp,
667  &arm_class_reg_req_gp,
668  };
669 
670  /* construct in array */
671  ir_node *const in[] = {
672  left,
673  right,
674  };
675 
676  ir_graph *const irg = get_irn_irg(block);
677  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_And, arm_mode_gp, 2, in);
678 
679  /* init node attributes */
680 
681  /* flags */
682  arch_irn_flags_t irn_flags = arch_irn_flags_none;
683  irn_flags |= arch_irn_flag_rematerializable;
684  int const n_res = 1;
685  be_info_init_irn(res, irn_flags, in_reqs, n_res);
686  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
687  (void)attr; /* avoid potential warning */
688  init_arm_attributes(res);
689  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
690  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
691  out_infos[0].req = &arm_class_reg_req_gp;
692 
693  verify_new_node(res);
694  return optimize_node(res);
695 }
696 
697 ir_node *new_bd_arm_And_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
698 {
699  static arch_register_req_t const *in_reqs[] = {
700  &arm_class_reg_req_gp,
701  &arm_class_reg_req_gp,
702  };
703 
704  /* construct in array */
705  ir_node *const in[] = {
706  left,
707  right,
708  };
709 
710  ir_graph *const irg = get_irn_irg(block);
711  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_And, arm_mode_gp, 2, in);
712 
713  /* init node attributes */
714 
715  /* flags */
716  arch_irn_flags_t irn_flags = arch_irn_flags_none;
717  irn_flags |= arch_irn_flag_rematerializable;
718  int const n_res = 1;
719  be_info_init_irn(res, irn_flags, in_reqs, n_res);
720  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
721  (void)attr; /* avoid potential warning */
722  init_arm_attributes(res);
723  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
724  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
725  out_infos[0].req = &arm_class_reg_req_gp;
726 
727  verify_new_node(res);
728  return optimize_node(res);
729 }
730 
731 ir_node *new_bd_arm_And_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
732 {
733  static arch_register_req_t const *in_reqs[] = {
734  &arm_class_reg_req_gp,
735  &arm_class_reg_req_gp,
736  &arm_class_reg_req_gp,
737  };
738 
739  /* construct in array */
740  ir_node *const in[] = {
741  left,
742  right,
743  shift,
744  };
745 
746  ir_graph *const irg = get_irn_irg(block);
747  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_And, arm_mode_gp, 3, in);
748 
749  /* init node attributes */
750 
751  /* flags */
752  arch_irn_flags_t irn_flags = arch_irn_flags_none;
753  irn_flags |= arch_irn_flag_rematerializable;
754  int const n_res = 1;
755  be_info_init_irn(res, irn_flags, in_reqs, n_res);
756  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
757  (void)attr; /* avoid potential warning */
758  init_arm_attributes(res);
759  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
760  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
761  out_infos[0].req = &arm_class_reg_req_gp;
762 
763  verify_new_node(res);
764  return optimize_node(res);
765 }
766 
767 ir_node *new_bd_arm_B(dbg_info *dbgi, ir_node *block)
768 {
769  arch_register_req_t const **const in_reqs = NULL;
770 
771 
772  ir_graph *const irg = get_irn_irg(block);
773  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_B, mode_X, 0, NULL);
774 
775  /* init node attributes */
776 
777  /* flags */
778  arch_irn_flags_t irn_flags = arch_irn_flags_none;
779  irn_flags |= arch_irn_flag_simple_jump;
780  irn_flags |= arch_irn_flag_fallthrough;
781  int const n_res = 1;
782  be_info_init_irn(res, irn_flags, in_reqs, n_res);
783  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
784  (void)attr; /* avoid potential warning */
785  init_arm_attributes(res);
786  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
787  out_infos[0].req = &arch_exec_requirement;
788 
789  verify_new_node(res);
790  return optimize_node(res);
791 }
792 
793 ir_node *new_bd_arm_Bcc(dbg_info *dbgi, ir_node *block, ir_node *flags, ir_relation relation)
794 {
795  static arch_register_req_t const *in_reqs[] = {
796  &arm_class_reg_req_flags,
797  };
798 
799  /* construct in array */
800  ir_node *const in[] = {
801  flags,
802  };
803 
804  ir_graph *const irg = get_irn_irg(block);
805  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bcc, mode_T, 1, in);
806 
807  /* init node attributes */
808 
809  /* flags */
810  arch_irn_flags_t irn_flags = arch_irn_flags_none;
811  irn_flags |= arch_irn_flag_fallthrough;
812  int const n_res = 2;
813  be_info_init_irn(res, irn_flags, in_reqs, n_res);
814  arm_CondJmp_attr_t *const attr = (arm_CondJmp_attr_t*)get_irn_generic_attr(res);
815  (void)attr; /* avoid potential warning */
816  init_arm_attributes(res);
817  set_arm_CondJmp_relation(res, relation);
818  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
819  out_infos[0].req = &arch_exec_requirement;
820  out_infos[1].req = &arch_exec_requirement;
821 
822  verify_new_node(res);
823  return optimize_node(res);
824 }
825 
826 ir_node *new_bd_arm_Bic_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
827 {
828  static arch_register_req_t const *in_reqs[] = {
829  &arm_class_reg_req_gp,
830  };
831 
832  /* construct in array */
833  ir_node *const in[] = {
834  left,
835  };
836 
837  ir_graph *const irg = get_irn_irg(block);
838  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bic, arm_mode_gp, 1, in);
839 
840  /* init node attributes */
841 
842  /* flags */
843  arch_irn_flags_t irn_flags = arch_irn_flags_none;
844  irn_flags |= arch_irn_flag_rematerializable;
845  int const n_res = 1;
846  be_info_init_irn(res, irn_flags, in_reqs, n_res);
847  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
848  (void)attr; /* avoid potential warning */
849  init_arm_attributes(res);
850  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
851  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
852  out_infos[0].req = &arm_class_reg_req_gp;
853 
854  verify_new_node(res);
855  return optimize_node(res);
856 }
857 
858 ir_node *new_bd_arm_Bic_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
859 {
860  static arch_register_req_t const *in_reqs[] = {
861  &arm_class_reg_req_gp,
862  &arm_class_reg_req_gp,
863  };
864 
865  /* construct in array */
866  ir_node *const in[] = {
867  left,
868  right,
869  };
870 
871  ir_graph *const irg = get_irn_irg(block);
872  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bic, arm_mode_gp, 2, in);
873 
874  /* init node attributes */
875 
876  /* flags */
877  arch_irn_flags_t irn_flags = arch_irn_flags_none;
878  irn_flags |= arch_irn_flag_rematerializable;
879  int const n_res = 1;
880  be_info_init_irn(res, irn_flags, in_reqs, n_res);
881  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
882  (void)attr; /* avoid potential warning */
883  init_arm_attributes(res);
884  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
885  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
886  out_infos[0].req = &arm_class_reg_req_gp;
887 
888  verify_new_node(res);
889  return optimize_node(res);
890 }
891 
892 ir_node *new_bd_arm_Bic_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
893 {
894  static arch_register_req_t const *in_reqs[] = {
895  &arm_class_reg_req_gp,
896  &arm_class_reg_req_gp,
897  };
898 
899  /* construct in array */
900  ir_node *const in[] = {
901  left,
902  right,
903  };
904 
905  ir_graph *const irg = get_irn_irg(block);
906  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bic, arm_mode_gp, 2, in);
907 
908  /* init node attributes */
909 
910  /* flags */
911  arch_irn_flags_t irn_flags = arch_irn_flags_none;
912  irn_flags |= arch_irn_flag_rematerializable;
913  int const n_res = 1;
914  be_info_init_irn(res, irn_flags, in_reqs, n_res);
915  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
916  (void)attr; /* avoid potential warning */
917  init_arm_attributes(res);
918  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
919  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
920  out_infos[0].req = &arm_class_reg_req_gp;
921 
922  verify_new_node(res);
923  return optimize_node(res);
924 }
925 
926 ir_node *new_bd_arm_Bic_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
927 {
928  static arch_register_req_t const *in_reqs[] = {
929  &arm_class_reg_req_gp,
930  &arm_class_reg_req_gp,
931  &arm_class_reg_req_gp,
932  };
933 
934  /* construct in array */
935  ir_node *const in[] = {
936  left,
937  right,
938  shift,
939  };
940 
941  ir_graph *const irg = get_irn_irg(block);
942  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bic, arm_mode_gp, 3, in);
943 
944  /* init node attributes */
945 
946  /* flags */
947  arch_irn_flags_t irn_flags = arch_irn_flags_none;
948  irn_flags |= arch_irn_flag_rematerializable;
949  int const n_res = 1;
950  be_info_init_irn(res, irn_flags, in_reqs, n_res);
951  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
952  (void)attr; /* avoid potential warning */
953  init_arm_attributes(res);
954  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
955  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
956  out_infos[0].req = &arm_class_reg_req_gp;
957 
958  verify_new_node(res);
959  return optimize_node(res);
960 }
961 
962 ir_node *new_bd_arm_Bl(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, ir_entity *entity, int offset)
963 {
964 
965 
966  ir_graph *const irg = get_irn_irg(block);
967  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bl, mode_T, arity, in);
968 
969  /* init node attributes */
970 
971  /* flags */
972  arch_irn_flags_t irn_flags = arch_irn_flags_none;
973  irn_flags |= arch_irn_flag_modify_flags;
974  be_info_init_irn(res, irn_flags, in_reqs, n_res);
975  arm_Address_attr_t *const attr = (arm_Address_attr_t*)get_irn_generic_attr(res);
976  (void)attr; /* avoid potential warning */
977  init_arm_attributes(res);
978  init_arm_Address_attributes(res, entity, offset);
979 
980  verify_new_node(res);
981  return optimize_node(res);
982 }
983 
984 ir_node *new_bd_arm_Clz(dbg_info *dbgi, ir_node *block, ir_node *op0)
985 {
986  static arch_register_req_t const *in_reqs[] = {
987  &arm_class_reg_req_gp,
988  };
989 
990  /* construct in array */
991  ir_node *const in[] = {
992  op0,
993  };
994 
995  ir_graph *const irg = get_irn_irg(block);
996  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Clz, arm_mode_gp, 1, in);
997 
998  /* init node attributes */
999 
1000  /* flags */
1001  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1002  irn_flags |= arch_irn_flag_rematerializable;
1003  int const n_res = 1;
1004  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1005  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1006  (void)attr; /* avoid potential warning */
1007  init_arm_attributes(res);
1008  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1009  out_infos[0].req = &arm_class_reg_req_gp;
1010 
1011  verify_new_node(res);
1012  return optimize_node(res);
1013 }
1014 
1015 ir_node *new_bd_arm_Cmfe(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, bool ins_permuted)
1016 {
1017  static arch_register_req_t const *in_reqs[] = {
1018  &arm_class_reg_req_fpa,
1019  &arm_class_reg_req_fpa,
1020  };
1021 
1022  /* construct in array */
1023  ir_node *const in[] = {
1024  op0,
1025  op1,
1026  };
1027 
1028  ir_graph *const irg = get_irn_irg(block);
1029  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmfe, arm_mode_flags, 2, in);
1030 
1031  /* init node attributes */
1032 
1033  /* flags */
1034  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1035  irn_flags |= arch_irn_flag_rematerializable;
1036  irn_flags |= arch_irn_flag_modify_flags;
1037  int const n_res = 1;
1038  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1039  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1040  (void)attr; /* avoid potential warning */
1041  bool const is_unsigned = false;
1042  init_arm_attributes(res);
1043  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1044  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1045  out_infos[0].req = &arm_class_reg_req_flags;
1046 
1047  verify_new_node(res);
1048  return optimize_node(res);
1049 }
1050 
1051 ir_node *new_bd_arm_Cmn_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot, bool ins_permuted, bool is_unsigned)
1052 {
1053  static arch_register_req_t const *in_reqs[] = {
1054  &arm_class_reg_req_gp,
1055  };
1056 
1057  /* construct in array */
1058  ir_node *const in[] = {
1059  left,
1060  };
1061 
1062  ir_graph *const irg = get_irn_irg(block);
1063  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 1, in);
1064 
1065  /* init node attributes */
1066 
1067  /* flags */
1068  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1069  irn_flags |= arch_irn_flag_rematerializable;
1070  irn_flags |= arch_irn_flag_modify_flags;
1071  int const n_res = 1;
1072  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1073  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1074  (void)attr; /* avoid potential warning */
1075  init_arm_attributes(res);
1076  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1077  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1078 
1079  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1080  out_infos[0].req = &arm_class_reg_req_flags;
1081 
1082  verify_new_node(res);
1083  return optimize_node(res);
1084 }
1085 
1086 ir_node *new_bd_arm_Cmn_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, bool ins_permuted, bool is_unsigned)
1087 {
1088  static arch_register_req_t const *in_reqs[] = {
1089  &arm_class_reg_req_gp,
1090  &arm_class_reg_req_gp,
1091  };
1092 
1093  /* construct in array */
1094  ir_node *const in[] = {
1095  left,
1096  right,
1097  };
1098 
1099  ir_graph *const irg = get_irn_irg(block);
1100  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 2, in);
1101 
1102  /* init node attributes */
1103 
1104  /* flags */
1105  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1106  irn_flags |= arch_irn_flag_rematerializable;
1107  irn_flags |= arch_irn_flag_modify_flags;
1108  int const n_res = 1;
1109  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1110  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1111  (void)attr; /* avoid potential warning */
1112  init_arm_attributes(res);
1113  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1114  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1115 
1116  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1117  out_infos[0].req = &arm_class_reg_req_flags;
1118 
1119  verify_new_node(res);
1120  return optimize_node(res);
1121 }
1122 
1123 ir_node *new_bd_arm_Cmn_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned)
1124 {
1125  static arch_register_req_t const *in_reqs[] = {
1126  &arm_class_reg_req_gp,
1127  &arm_class_reg_req_gp,
1128  };
1129 
1130  /* construct in array */
1131  ir_node *const in[] = {
1132  left,
1133  right,
1134  };
1135 
1136  ir_graph *const irg = get_irn_irg(block);
1137  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 2, in);
1138 
1139  /* init node attributes */
1140 
1141  /* flags */
1142  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1143  irn_flags |= arch_irn_flag_rematerializable;
1144  irn_flags |= arch_irn_flag_modify_flags;
1145  int const n_res = 1;
1146  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1147  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1148  (void)attr; /* avoid potential warning */
1149  init_arm_attributes(res);
1150  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1151  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1152 
1153  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1154  out_infos[0].req = &arm_class_reg_req_flags;
1155 
1156  verify_new_node(res);
1157  return optimize_node(res);
1158 }
1159 
1160 ir_node *new_bd_arm_Cmn_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned)
1161 {
1162  static arch_register_req_t const *in_reqs[] = {
1163  &arm_class_reg_req_gp,
1164  &arm_class_reg_req_gp,
1165  &arm_class_reg_req_gp,
1166  };
1167 
1168  /* construct in array */
1169  ir_node *const in[] = {
1170  left,
1171  right,
1172  shift,
1173  };
1174 
1175  ir_graph *const irg = get_irn_irg(block);
1176  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 3, in);
1177 
1178  /* init node attributes */
1179 
1180  /* flags */
1181  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1182  irn_flags |= arch_irn_flag_rematerializable;
1183  irn_flags |= arch_irn_flag_modify_flags;
1184  int const n_res = 1;
1185  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1186  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1187  (void)attr; /* avoid potential warning */
1188  init_arm_attributes(res);
1189  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1190  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1191 
1192  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1193  out_infos[0].req = &arm_class_reg_req_flags;
1194 
1195  verify_new_node(res);
1196  return optimize_node(res);
1197 }
1198 
1199 ir_node *new_bd_arm_Cmp_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot, bool ins_permuted, bool is_unsigned)
1200 {
1201  static arch_register_req_t const *in_reqs[] = {
1202  &arm_class_reg_req_gp,
1203  };
1204 
1205  /* construct in array */
1206  ir_node *const in[] = {
1207  left,
1208  };
1209 
1210  ir_graph *const irg = get_irn_irg(block);
1211  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 1, in);
1212 
1213  /* init node attributes */
1214 
1215  /* flags */
1216  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1217  irn_flags |= arch_irn_flag_rematerializable;
1218  irn_flags |= arch_irn_flag_modify_flags;
1219  int const n_res = 1;
1220  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1221  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1222  (void)attr; /* avoid potential warning */
1223  init_arm_attributes(res);
1224  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1225  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1226 
1227  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1228  out_infos[0].req = &arm_class_reg_req_flags;
1229 
1230  verify_new_node(res);
1231  return optimize_node(res);
1232 }
1233 
1234 ir_node *new_bd_arm_Cmp_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, bool ins_permuted, bool is_unsigned)
1235 {
1236  static arch_register_req_t const *in_reqs[] = {
1237  &arm_class_reg_req_gp,
1238  &arm_class_reg_req_gp,
1239  };
1240 
1241  /* construct in array */
1242  ir_node *const in[] = {
1243  left,
1244  right,
1245  };
1246 
1247  ir_graph *const irg = get_irn_irg(block);
1248  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 2, in);
1249 
1250  /* init node attributes */
1251 
1252  /* flags */
1253  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1254  irn_flags |= arch_irn_flag_rematerializable;
1255  irn_flags |= arch_irn_flag_modify_flags;
1256  int const n_res = 1;
1257  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1258  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1259  (void)attr; /* avoid potential warning */
1260  init_arm_attributes(res);
1261  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1262  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1263 
1264  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1265  out_infos[0].req = &arm_class_reg_req_flags;
1266 
1267  verify_new_node(res);
1268  return optimize_node(res);
1269 }
1270 
1271 ir_node *new_bd_arm_Cmp_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned)
1272 {
1273  static arch_register_req_t const *in_reqs[] = {
1274  &arm_class_reg_req_gp,
1275  &arm_class_reg_req_gp,
1276  };
1277 
1278  /* construct in array */
1279  ir_node *const in[] = {
1280  left,
1281  right,
1282  };
1283 
1284  ir_graph *const irg = get_irn_irg(block);
1285  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 2, in);
1286 
1287  /* init node attributes */
1288 
1289  /* flags */
1290  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1291  irn_flags |= arch_irn_flag_rematerializable;
1292  irn_flags |= arch_irn_flag_modify_flags;
1293  int const n_res = 1;
1294  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1295  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1296  (void)attr; /* avoid potential warning */
1297  init_arm_attributes(res);
1298  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1299  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1300 
1301  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1302  out_infos[0].req = &arm_class_reg_req_flags;
1303 
1304  verify_new_node(res);
1305  return optimize_node(res);
1306 }
1307 
1308 ir_node *new_bd_arm_Cmp_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned)
1309 {
1310  static arch_register_req_t const *in_reqs[] = {
1311  &arm_class_reg_req_gp,
1312  &arm_class_reg_req_gp,
1313  &arm_class_reg_req_gp,
1314  };
1315 
1316  /* construct in array */
1317  ir_node *const in[] = {
1318  left,
1319  right,
1320  shift,
1321  };
1322 
1323  ir_graph *const irg = get_irn_irg(block);
1324  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 3, in);
1325 
1326  /* init node attributes */
1327 
1328  /* flags */
1329  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1330  irn_flags |= arch_irn_flag_rematerializable;
1331  irn_flags |= arch_irn_flag_modify_flags;
1332  int const n_res = 1;
1333  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1334  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1335  (void)attr; /* avoid potential warning */
1336  init_arm_attributes(res);
1337  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1338  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1339 
1340  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1341  out_infos[0].req = &arm_class_reg_req_flags;
1342 
1343  verify_new_node(res);
1344  return optimize_node(res);
1345 }
1346 
1347 ir_node *new_bd_arm_Dvf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode)
1348 {
1349  static arch_register_req_t const *in_reqs[] = {
1350  &arm_class_reg_req_fpa,
1351  &arm_class_reg_req_fpa,
1352  };
1353 
1354  /* construct in array */
1355  ir_node *const in[] = {
1356  op0,
1357  op1,
1358  };
1359 
1360  ir_graph *const irg = get_irn_irg(block);
1361  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Dvf, mode_F, 2, in);
1362 
1363  /* init node attributes */
1364 
1365  /* flags */
1366  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1367  int const n_res = 2;
1368  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1369  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
1370  (void)attr; /* avoid potential warning */
1371  init_arm_attributes(res);
1372  init_arm_farith_attributes(res, op_mode);
1373  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1374  out_infos[0].req = &arm_class_reg_req_fpa;
1375  out_infos[1].req = &arch_memory_requirement;
1376 
1377  verify_new_node(res);
1378  return optimize_node(res);
1379 }
1380 
1381 ir_node *new_bd_arm_Eor_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
1382 {
1383  static arch_register_req_t const *in_reqs[] = {
1384  &arm_class_reg_req_gp,
1385  };
1386 
1387  /* construct in array */
1388  ir_node *const in[] = {
1389  left,
1390  };
1391 
1392  ir_graph *const irg = get_irn_irg(block);
1393  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Eor, arm_mode_gp, 1, in);
1394 
1395  /* init node attributes */
1396 
1397  /* flags */
1398  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1399  irn_flags |= arch_irn_flag_rematerializable;
1400  int const n_res = 1;
1401  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1402  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1403  (void)attr; /* avoid potential warning */
1404  init_arm_attributes(res);
1405  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1406  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1407  out_infos[0].req = &arm_class_reg_req_gp;
1408 
1409  verify_new_node(res);
1410  return optimize_node(res);
1411 }
1412 
1413 ir_node *new_bd_arm_Eor_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
1414 {
1415  static arch_register_req_t const *in_reqs[] = {
1416  &arm_class_reg_req_gp,
1417  &arm_class_reg_req_gp,
1418  };
1419 
1420  /* construct in array */
1421  ir_node *const in[] = {
1422  left,
1423  right,
1424  };
1425 
1426  ir_graph *const irg = get_irn_irg(block);
1427  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Eor, arm_mode_gp, 2, in);
1428 
1429  /* init node attributes */
1430 
1431  /* flags */
1432  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1433  irn_flags |= arch_irn_flag_rematerializable;
1434  int const n_res = 1;
1435  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1436  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1437  (void)attr; /* avoid potential warning */
1438  init_arm_attributes(res);
1439  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1440  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1441  out_infos[0].req = &arm_class_reg_req_gp;
1442 
1443  verify_new_node(res);
1444  return optimize_node(res);
1445 }
1446 
1447 ir_node *new_bd_arm_Eor_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
1448 {
1449  static arch_register_req_t const *in_reqs[] = {
1450  &arm_class_reg_req_gp,
1451  &arm_class_reg_req_gp,
1452  };
1453 
1454  /* construct in array */
1455  ir_node *const in[] = {
1456  left,
1457  right,
1458  };
1459 
1460  ir_graph *const irg = get_irn_irg(block);
1461  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Eor, arm_mode_gp, 2, in);
1462 
1463  /* init node attributes */
1464 
1465  /* flags */
1466  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1467  irn_flags |= arch_irn_flag_rematerializable;
1468  int const n_res = 1;
1469  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1470  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1471  (void)attr; /* avoid potential warning */
1472  init_arm_attributes(res);
1473  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1474  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1475  out_infos[0].req = &arm_class_reg_req_gp;
1476 
1477  verify_new_node(res);
1478  return optimize_node(res);
1479 }
1480 
1481 ir_node *new_bd_arm_Eor_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
1482 {
1483  static arch_register_req_t const *in_reqs[] = {
1484  &arm_class_reg_req_gp,
1485  &arm_class_reg_req_gp,
1486  &arm_class_reg_req_gp,
1487  };
1488 
1489  /* construct in array */
1490  ir_node *const in[] = {
1491  left,
1492  right,
1493  shift,
1494  };
1495 
1496  ir_graph *const irg = get_irn_irg(block);
1497  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Eor, arm_mode_gp, 3, in);
1498 
1499  /* init node attributes */
1500 
1501  /* flags */
1502  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1503  irn_flags |= arch_irn_flag_rematerializable;
1504  int const n_res = 1;
1505  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1506  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1507  (void)attr; /* avoid potential warning */
1508  init_arm_attributes(res);
1509  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1510  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1511  out_infos[0].req = &arm_class_reg_req_gp;
1512 
1513  verify_new_node(res);
1514  return optimize_node(res);
1515 }
1516 
1517 ir_node *new_bd_arm_Flt(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_mode *op_mode)
1518 {
1519  static arch_register_req_t const *in_reqs[] = {
1520  &arm_class_reg_req_gp,
1521  };
1522 
1523  /* construct in array */
1524  ir_node *const in[] = {
1525  op0,
1526  };
1527 
1528  ir_graph *const irg = get_irn_irg(block);
1529  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Flt, mode_F, 1, in);
1530 
1531  /* init node attributes */
1532 
1533  /* flags */
1534  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1535  irn_flags |= arch_irn_flag_rematerializable;
1536  int const n_res = 1;
1537  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1538  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
1539  (void)attr; /* avoid potential warning */
1540  init_arm_attributes(res);
1541  init_arm_farith_attributes(res, op_mode);
1542  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1543  out_infos[0].req = &arm_class_reg_req_fpa;
1544 
1545  verify_new_node(res);
1546  return optimize_node(res);
1547 }
1548 
1549 ir_node *new_bd_arm_FrameAddr(dbg_info *dbgi, ir_node *block, ir_node *base, ir_entity *entity, int offset)
1550 {
1551  static arch_register_req_t const *in_reqs[] = {
1552  &arm_class_reg_req_gp,
1553  };
1554 
1555  /* construct in array */
1556  ir_node *const in[] = {
1557  base,
1558  };
1559 
1560  ir_graph *const irg = get_irn_irg(block);
1561  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_FrameAddr, arm_mode_gp, 1, in);
1562 
1563  /* init node attributes */
1564 
1565  /* flags */
1566  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1567  irn_flags |= arch_irn_flag_rematerializable;
1568  int const n_res = 1;
1569  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1570  arm_Address_attr_t *const attr = (arm_Address_attr_t*)get_irn_generic_attr(res);
1571  (void)attr; /* avoid potential warning */
1572  init_arm_attributes(res);
1573  init_arm_Address_attributes(res, entity, offset);
1574  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1575  out_infos[0].req = &arm_class_reg_req_gp;
1576 
1577  verify_new_node(res);
1578  return optimize_node(res);
1579 }
1580 
1581 ir_node *new_bd_arm_IJmp(dbg_info *dbgi, ir_node *block, ir_node *target)
1582 {
1583  static arch_register_req_t const *in_reqs[] = {
1584  &arm_class_reg_req_gp,
1585  };
1586 
1587  /* construct in array */
1588  ir_node *const in[] = {
1589  target,
1590  };
1591 
1592  ir_graph *const irg = get_irn_irg(block);
1593  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_IJmp, mode_X, 1, in);
1594 
1595  /* init node attributes */
1596 
1597  /* flags */
1598  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1599  int const n_res = 1;
1600  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1601  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1602  (void)attr; /* avoid potential warning */
1603  init_arm_attributes(res);
1604  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1605  out_infos[0].req = &arch_exec_requirement;
1606 
1607  verify_new_node(res);
1608  return optimize_node(res);
1609 }
1610 
1611 ir_node *new_bd_arm_Ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
1612 {
1613  static arch_register_req_t const *in_reqs[] = {
1614  &arm_class_reg_req_gp,
1615  &arch_memory_requirement,
1616  };
1617 
1618  /* construct in array */
1619  ir_node *const in[] = {
1620  ptr,
1621  mem,
1622  };
1623 
1624  ir_graph *const irg = get_irn_irg(block);
1625  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Ldf, mode_T, 2, in);
1626 
1627  /* init node attributes */
1628 
1629  /* flags */
1630  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1631  int const n_res = 2;
1632  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1633  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
1634  (void)attr; /* avoid potential warning */
1635  init_arm_attributes(res);
1636  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1637  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1638  out_infos[0].req = &arm_class_reg_req_fpa;
1639  out_infos[1].req = &arch_memory_requirement;
1640 
1641  verify_new_node(res);
1642  return optimize_node(res);
1643 }
1644 
1645 ir_node *new_bd_arm_Ldr(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
1646 {
1647  static arch_register_req_t const *in_reqs[] = {
1648  &arm_class_reg_req_gp,
1649  &arch_memory_requirement,
1650  };
1651 
1652  /* construct in array */
1653  ir_node *const in[] = {
1654  ptr,
1655  mem,
1656  };
1657 
1658  ir_graph *const irg = get_irn_irg(block);
1659  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Ldr, mode_T, 2, in);
1660 
1661  /* init node attributes */
1662 
1663  /* flags */
1664  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1665  int const n_res = 2;
1666  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1667  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
1668  (void)attr; /* avoid potential warning */
1669  init_arm_attributes(res);
1670  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1671  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1672  out_infos[0].req = &arm_class_reg_req_gp;
1673  out_infos[1].req = &arch_memory_requirement;
1674 
1675  verify_new_node(res);
1676  return optimize_node(res);
1677 }
1678 
1679 ir_node *new_bd_arm_LinkLdrPC(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
1680 {
1681 
1682 
1683  ir_graph *const irg = get_irn_irg(block);
1684  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_LinkLdrPC, mode_T, arity, in);
1685 
1686  /* init node attributes */
1687 
1688  /* flags */
1689  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1690  irn_flags |= arch_irn_flag_modify_flags;
1691  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1692  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
1693  (void)attr; /* avoid potential warning */
1694  init_arm_attributes(res);
1695  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1696 
1697  verify_new_node(res);
1698  return optimize_node(res);
1699 }
1700 
1701 ir_node *new_bd_arm_LinkMovPC(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, unsigned shiftop_input, arm_shift_modifier_t shift_modifier, unsigned char immediate_value, unsigned char immediate_rot)
1702 {
1703 
1704 
1705  ir_graph *const irg = get_irn_irg(block);
1706  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_LinkMovPC, mode_T, arity, in);
1707 
1708  /* init node attributes */
1709 
1710  /* flags */
1711  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1712  irn_flags |= arch_irn_flag_modify_flags;
1713  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1714  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1715  (void)attr; /* avoid potential warning */
1716  init_arm_attributes(res);
1717  init_arm_shifter_operand(res, shiftop_input, immediate_value, shift_modifier, immediate_rot);
1718 
1719 
1720  verify_new_node(res);
1721  return optimize_node(res);
1722 }
1723 
1724 ir_node *new_bd_arm_Mla(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *add)
1725 {
1726  static arch_register_req_t const *in_reqs[] = {
1727  &arm_class_reg_req_gp,
1728  &arm_class_reg_req_gp,
1729  &arm_class_reg_req_gp,
1730  };
1731 
1732  /* construct in array */
1733  ir_node *const in[] = {
1734  left,
1735  right,
1736  add,
1737  };
1738 
1739  ir_graph *const irg = get_irn_irg(block);
1740  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mla, arm_mode_gp, 3, in);
1741 
1742  /* init node attributes */
1743 
1744  /* flags */
1745  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1746  irn_flags |= arch_irn_flag_rematerializable;
1747  int const n_res = 1;
1748  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1749  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1750  (void)attr; /* avoid potential warning */
1751  init_arm_attributes(res);
1752  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1753  out_infos[0].req = &arm_class_reg_req_gp;
1754 
1755  verify_new_node(res);
1756  return optimize_node(res);
1757 }
1758 
1759 ir_node *new_bd_arm_Mla_v5(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *add)
1760 {
1761  static arch_register_req_t const *in_reqs[] = {
1762  &arm_class_reg_req_gp,
1763  &arm_class_reg_req_gp,
1764  &arm_class_reg_req_gp,
1765  };
1766 
1767  /* construct in array */
1768  ir_node *const in[] = {
1769  left,
1770  right,
1771  add,
1772  };
1773 
1774  ir_graph *const irg = get_irn_irg(block);
1775  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mla, arm_mode_gp, 3, in);
1776 
1777  /* init node attributes */
1778 
1779  /* flags */
1780  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1781  irn_flags |= arch_irn_flag_rematerializable;
1782  int const n_res = 1;
1783  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1784  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1785  (void)attr; /* avoid potential warning */
1786  init_arm_attributes(res);
1787  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1788  out_infos[0].req = &arm_requirements_gp_not_in_r0;
1789 
1790  verify_new_node(res);
1791  return optimize_node(res);
1792 }
1793 
1794 ir_node *new_bd_arm_Mls(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *sub)
1795 {
1796  static arch_register_req_t const *in_reqs[] = {
1797  &arm_class_reg_req_gp,
1798  &arm_class_reg_req_gp,
1799  &arm_class_reg_req_gp,
1800  };
1801 
1802  /* construct in array */
1803  ir_node *const in[] = {
1804  left,
1805  right,
1806  sub,
1807  };
1808 
1809  ir_graph *const irg = get_irn_irg(block);
1810  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mls, arm_mode_gp, 3, in);
1811 
1812  /* init node attributes */
1813 
1814  /* flags */
1815  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1816  irn_flags |= arch_irn_flag_rematerializable;
1817  int const n_res = 1;
1818  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1819  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1820  (void)attr; /* avoid potential warning */
1821  init_arm_attributes(res);
1822  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1823  out_infos[0].req = &arm_class_reg_req_gp;
1824 
1825  verify_new_node(res);
1826  return optimize_node(res);
1827 }
1828 
1829 ir_node *new_bd_arm_Mov_imm(dbg_info *dbgi, ir_node *block, unsigned char immediate_value, unsigned char immediate_rot)
1830 {
1831  static arch_register_req_t const *in_reqs[] = {
1832  };
1833 
1834 
1835  ir_graph *const irg = get_irn_irg(block);
1836  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 0, NULL);
1837 
1838  /* init node attributes */
1839 
1840  /* flags */
1841  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1842  irn_flags |= arch_irn_flag_rematerializable;
1843  int const n_res = 1;
1844  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1845  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1846  (void)attr; /* avoid potential warning */
1847  init_arm_attributes(res);
1848  init_arm_shifter_operand(res, 0, immediate_value, ARM_SHF_IMM, immediate_rot);
1849  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1850  out_infos[0].req = &arm_class_reg_req_gp;
1851 
1852  verify_new_node(res);
1853  return optimize_node(res);
1854 }
1855 
1856 ir_node *new_bd_arm_Mov_reg(dbg_info *dbgi, ir_node *block, ir_node *Rm)
1857 {
1858  static arch_register_req_t const *in_reqs[] = {
1859  &arm_class_reg_req_gp,
1860  };
1861 
1862  /* construct in array */
1863  ir_node *const in[] = {
1864  Rm,
1865  };
1866 
1867  ir_graph *const irg = get_irn_irg(block);
1868  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 1, in);
1869 
1870  /* init node attributes */
1871 
1872  /* flags */
1873  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1874  irn_flags |= arch_irn_flag_rematerializable;
1875  int const n_res = 1;
1876  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1877  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1878  (void)attr; /* avoid potential warning */
1879  init_arm_attributes(res);
1880  init_arm_shifter_operand(res, 0, 0, ARM_SHF_REG, 0);
1881  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1882  out_infos[0].req = &arm_class_reg_req_gp;
1883 
1884  verify_new_node(res);
1885  return optimize_node(res);
1886 }
1887 
1888 ir_node *new_bd_arm_Mov_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *Rm, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
1889 {
1890  static arch_register_req_t const *in_reqs[] = {
1891  &arm_class_reg_req_gp,
1892  };
1893 
1894  /* construct in array */
1895  ir_node *const in[] = {
1896  Rm,
1897  };
1898 
1899  ir_graph *const irg = get_irn_irg(block);
1900  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 1, in);
1901 
1902  /* init node attributes */
1903 
1904  /* flags */
1905  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1906  irn_flags |= arch_irn_flag_rematerializable;
1907  int const n_res = 1;
1908  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1909  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1910  (void)attr; /* avoid potential warning */
1911  init_arm_attributes(res);
1912  init_arm_shifter_operand(res, 0, 0, shift_modifier, shift_immediate);
1913  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1914  out_infos[0].req = &arm_class_reg_req_gp;
1915 
1916  verify_new_node(res);
1917  return optimize_node(res);
1918 }
1919 
1920 ir_node *new_bd_arm_Mov_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *Rm, ir_node *Rs, arm_shift_modifier_t shift_modifier)
1921 {
1922  static arch_register_req_t const *in_reqs[] = {
1923  &arm_class_reg_req_gp,
1924  &arm_class_reg_req_gp,
1925  };
1926 
1927  /* construct in array */
1928  ir_node *const in[] = {
1929  Rm,
1930  Rs,
1931  };
1932 
1933  ir_graph *const irg = get_irn_irg(block);
1934  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 2, in);
1935 
1936  /* init node attributes */
1937 
1938  /* flags */
1939  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1940  irn_flags |= arch_irn_flag_rematerializable;
1941  int const n_res = 1;
1942  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1943  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1944  (void)attr; /* avoid potential warning */
1945  init_arm_attributes(res);
1946  init_arm_shifter_operand(res, 0, 0, shift_modifier, 0);
1947  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1948  out_infos[0].req = &arm_class_reg_req_gp;
1949 
1950  verify_new_node(res);
1951  return optimize_node(res);
1952 }
1953 
1954 ir_node *new_bd_arm_Muf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode)
1955 {
1956  static arch_register_req_t const *in_reqs[] = {
1957  &arm_class_reg_req_fpa,
1958  &arm_class_reg_req_fpa,
1959  };
1960 
1961  /* construct in array */
1962  ir_node *const in[] = {
1963  op0,
1964  op1,
1965  };
1966 
1967  ir_graph *const irg = get_irn_irg(block);
1968  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Muf, mode_F, 2, in);
1969 
1970  /* init node attributes */
1971 
1972  /* flags */
1973  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1974  irn_flags |= arch_irn_flag_rematerializable;
1975  int const n_res = 1;
1976  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1977  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
1978  (void)attr; /* avoid potential warning */
1979  init_arm_attributes(res);
1980  init_arm_farith_attributes(res, op_mode);
1981  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1982  out_infos[0].req = &arm_class_reg_req_fpa;
1983 
1984  verify_new_node(res);
1985  return optimize_node(res);
1986 }
1987 
1988 ir_node *new_bd_arm_Mul(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
1989 {
1990  static arch_register_req_t const *in_reqs[] = {
1991  &arm_class_reg_req_gp,
1992  &arm_class_reg_req_gp,
1993  };
1994 
1995  /* construct in array */
1996  ir_node *const in[] = {
1997  op0,
1998  op1,
1999  };
2000 
2001  ir_graph *const irg = get_irn_irg(block);
2002  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mul, arm_mode_gp, 2, in);
2003 
2004  /* init node attributes */
2005 
2006  /* flags */
2007  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2008  irn_flags |= arch_irn_flag_rematerializable;
2009  int const n_res = 1;
2010  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2011  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
2012  (void)attr; /* avoid potential warning */
2013  init_arm_attributes(res);
2014  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2015  out_infos[0].req = &arm_class_reg_req_gp;
2016 
2017  verify_new_node(res);
2018  return optimize_node(res);
2019 }
2020 
2021 ir_node *new_bd_arm_Mul_v5(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
2022 {
2023  static arch_register_req_t const *in_reqs[] = {
2024  &arm_class_reg_req_gp,
2025  &arm_class_reg_req_gp,
2026  };
2027 
2028  /* construct in array */
2029  ir_node *const in[] = {
2030  op0,
2031  op1,
2032  };
2033 
2034  ir_graph *const irg = get_irn_irg(block);
2035  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mul, arm_mode_gp, 2, in);
2036 
2037  /* init node attributes */
2038 
2039  /* flags */
2040  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2041  irn_flags |= arch_irn_flag_rematerializable;
2042  int const n_res = 1;
2043  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2044  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
2045  (void)attr; /* avoid potential warning */
2046  init_arm_attributes(res);
2047  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2048  out_infos[0].req = &arm_requirements_gp_not_in_r0;
2049 
2050  verify_new_node(res);
2051  return optimize_node(res);
2052 }
2053 
2054 ir_node *new_bd_arm_Mvf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_mode *op_mode)
2055 {
2056  static arch_register_req_t const *in_reqs[] = {
2057  &arm_class_reg_req_fpa,
2058  };
2059 
2060  /* construct in array */
2061  ir_node *const in[] = {
2062  op0,
2063  };
2064 
2065  ir_graph *const irg = get_irn_irg(block);
2066  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvf, mode_F, 1, in);
2067 
2068  /* init node attributes */
2069 
2070  /* flags */
2071  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2072  irn_flags |= arch_irn_flag_rematerializable;
2073  int const n_res = 1;
2074  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2075  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
2076  (void)attr; /* avoid potential warning */
2077  init_arm_attributes(res);
2078  init_arm_farith_attributes(res, op_mode);
2079  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2080  out_infos[0].req = &arm_class_reg_req_fpa;
2081 
2082  verify_new_node(res);
2083  return optimize_node(res);
2084 }
2085 
2086 ir_node *new_bd_arm_Mvn_imm(dbg_info *dbgi, ir_node *block, unsigned char immediate_value, unsigned char immediate_rot)
2087 {
2088  static arch_register_req_t const *in_reqs[] = {
2089  };
2090 
2091 
2092  ir_graph *const irg = get_irn_irg(block);
2093  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 0, NULL);
2094 
2095  /* init node attributes */
2096 
2097  /* flags */
2098  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2099  irn_flags |= arch_irn_flag_rematerializable;
2100  int const n_res = 1;
2101  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2102  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2103  (void)attr; /* avoid potential warning */
2104  init_arm_attributes(res);
2105  init_arm_shifter_operand(res, 0, immediate_value, ARM_SHF_IMM, immediate_rot);
2106  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2107  out_infos[0].req = &arm_class_reg_req_gp;
2108 
2109  verify_new_node(res);
2110  return optimize_node(res);
2111 }
2112 
2113 ir_node *new_bd_arm_Mvn_reg(dbg_info *dbgi, ir_node *block, ir_node *Rm)
2114 {
2115  static arch_register_req_t const *in_reqs[] = {
2116  &arm_class_reg_req_gp,
2117  };
2118 
2119  /* construct in array */
2120  ir_node *const in[] = {
2121  Rm,
2122  };
2123 
2124  ir_graph *const irg = get_irn_irg(block);
2125  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 1, in);
2126 
2127  /* init node attributes */
2128 
2129  /* flags */
2130  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2131  irn_flags |= arch_irn_flag_rematerializable;
2132  int const n_res = 1;
2133  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2134  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2135  (void)attr; /* avoid potential warning */
2136  init_arm_attributes(res);
2137  init_arm_shifter_operand(res, 0, 0, ARM_SHF_REG, 0);
2138  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2139  out_infos[0].req = &arm_class_reg_req_gp;
2140 
2141  verify_new_node(res);
2142  return optimize_node(res);
2143 }
2144 
2145 ir_node *new_bd_arm_Mvn_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *Rm, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2146 {
2147  static arch_register_req_t const *in_reqs[] = {
2148  &arm_class_reg_req_gp,
2149  };
2150 
2151  /* construct in array */
2152  ir_node *const in[] = {
2153  Rm,
2154  };
2155 
2156  ir_graph *const irg = get_irn_irg(block);
2157  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 1, in);
2158 
2159  /* init node attributes */
2160 
2161  /* flags */
2162  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2163  irn_flags |= arch_irn_flag_rematerializable;
2164  int const n_res = 1;
2165  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2166  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2167  (void)attr; /* avoid potential warning */
2168  init_arm_attributes(res);
2169  init_arm_shifter_operand(res, 0, 0, shift_modifier, shift_immediate);
2170  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2171  out_infos[0].req = &arm_class_reg_req_gp;
2172 
2173  verify_new_node(res);
2174  return optimize_node(res);
2175 }
2176 
2177 ir_node *new_bd_arm_Mvn_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *Rm, ir_node *Rs, arm_shift_modifier_t shift_modifier)
2178 {
2179  static arch_register_req_t const *in_reqs[] = {
2180  &arm_class_reg_req_gp,
2181  &arm_class_reg_req_gp,
2182  };
2183 
2184  /* construct in array */
2185  ir_node *const in[] = {
2186  Rm,
2187  Rs,
2188  };
2189 
2190  ir_graph *const irg = get_irn_irg(block);
2191  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 2, in);
2192 
2193  /* init node attributes */
2194 
2195  /* flags */
2196  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2197  irn_flags |= arch_irn_flag_rematerializable;
2198  int const n_res = 1;
2199  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2200  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2201  (void)attr; /* avoid potential warning */
2202  init_arm_attributes(res);
2203  init_arm_shifter_operand(res, 0, 0, shift_modifier, 0);
2204  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2205  out_infos[0].req = &arm_class_reg_req_gp;
2206 
2207  verify_new_node(res);
2208  return optimize_node(res);
2209 }
2210 
2211 ir_node *new_bd_arm_OrPl_t(dbg_info *dbgi, ir_node *block, ir_node *falseval, ir_node *flags, ir_node *left, ir_node *right, ir_mode *mode)
2212 {
2213 
2214  /* construct in array */
2215  ir_node *const in[] = {
2216  falseval,
2217  flags,
2218  left,
2219  right,
2220  };
2221 
2222  ir_graph *const irg = get_irn_irg(block);
2223  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_OrPl_t, mode, 4, in);
2224 
2225  /* init node attributes */
2226 
2227  verify_new_node(res);
2228  return optimize_node(res);
2229 }
2230 
2231 ir_node *new_bd_arm_Orr_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2232 {
2233  static arch_register_req_t const *in_reqs[] = {
2234  &arm_class_reg_req_gp,
2235  };
2236 
2237  /* construct in array */
2238  ir_node *const in[] = {
2239  left,
2240  };
2241 
2242  ir_graph *const irg = get_irn_irg(block);
2243  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Orr, arm_mode_gp, 1, in);
2244 
2245  /* init node attributes */
2246 
2247  /* flags */
2248  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2249  irn_flags |= arch_irn_flag_rematerializable;
2250  int const n_res = 1;
2251  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2252  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2253  (void)attr; /* avoid potential warning */
2254  init_arm_attributes(res);
2255  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2256  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2257  out_infos[0].req = &arm_class_reg_req_gp;
2258 
2259  verify_new_node(res);
2260  return optimize_node(res);
2261 }
2262 
2263 ir_node *new_bd_arm_Orr_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2264 {
2265  static arch_register_req_t const *in_reqs[] = {
2266  &arm_class_reg_req_gp,
2267  &arm_class_reg_req_gp,
2268  };
2269 
2270  /* construct in array */
2271  ir_node *const in[] = {
2272  left,
2273  right,
2274  };
2275 
2276  ir_graph *const irg = get_irn_irg(block);
2277  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Orr, arm_mode_gp, 2, in);
2278 
2279  /* init node attributes */
2280 
2281  /* flags */
2282  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2283  irn_flags |= arch_irn_flag_rematerializable;
2284  int const n_res = 1;
2285  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2286  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2287  (void)attr; /* avoid potential warning */
2288  init_arm_attributes(res);
2289  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2290  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2291  out_infos[0].req = &arm_class_reg_req_gp;
2292 
2293  verify_new_node(res);
2294  return optimize_node(res);
2295 }
2296 
2297 ir_node *new_bd_arm_Orr_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2298 {
2299  static arch_register_req_t const *in_reqs[] = {
2300  &arm_class_reg_req_gp,
2301  &arm_class_reg_req_gp,
2302  };
2303 
2304  /* construct in array */
2305  ir_node *const in[] = {
2306  left,
2307  right,
2308  };
2309 
2310  ir_graph *const irg = get_irn_irg(block);
2311  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Orr, arm_mode_gp, 2, in);
2312 
2313  /* init node attributes */
2314 
2315  /* flags */
2316  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2317  irn_flags |= arch_irn_flag_rematerializable;
2318  int const n_res = 1;
2319  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2320  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2321  (void)attr; /* avoid potential warning */
2322  init_arm_attributes(res);
2323  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2324  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2325  out_infos[0].req = &arm_class_reg_req_gp;
2326 
2327  verify_new_node(res);
2328  return optimize_node(res);
2329 }
2330 
2331 ir_node *new_bd_arm_Orr_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2332 {
2333  static arch_register_req_t const *in_reqs[] = {
2334  &arm_class_reg_req_gp,
2335  &arm_class_reg_req_gp,
2336  &arm_class_reg_req_gp,
2337  };
2338 
2339  /* construct in array */
2340  ir_node *const in[] = {
2341  left,
2342  right,
2343  shift,
2344  };
2345 
2346  ir_graph *const irg = get_irn_irg(block);
2347  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Orr, arm_mode_gp, 3, in);
2348 
2349  /* init node attributes */
2350 
2351  /* flags */
2352  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2353  irn_flags |= arch_irn_flag_rematerializable;
2354  int const n_res = 1;
2355  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2356  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2357  (void)attr; /* avoid potential warning */
2358  init_arm_attributes(res);
2359  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2360  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2361  out_infos[0].req = &arm_class_reg_req_gp;
2362 
2363  verify_new_node(res);
2364  return optimize_node(res);
2365 }
2366 
2367 ir_node *new_bd_arm_OrrPl(dbg_info *dbgi, ir_node *block, ir_node *falseval, ir_node *flags, ir_node *left, ir_node *right)
2368 {
2369  static arch_register_req_t const *in_reqs[] = {
2370  &arm_class_reg_req_gp,
2371  &arm_class_reg_req_flags,
2372  &arm_class_reg_req_gp,
2373  &arm_class_reg_req_gp,
2374  };
2375 
2376  /* construct in array */
2377  ir_node *const in[] = {
2378  falseval,
2379  flags,
2380  left,
2381  right,
2382  };
2383 
2384  ir_graph *const irg = get_irn_irg(block);
2385  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_OrrPl, arm_mode_gp, 4, in);
2386 
2387  /* init node attributes */
2388 
2389  /* flags */
2390  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2391  int const n_res = 1;
2392  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2393  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2394  (void)attr; /* avoid potential warning */
2395  init_arm_attributes(res);
2396  init_arm_shifter_operand(res, 3, 0, ARM_SHF_REG, 0);
2397  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2398  out_infos[0].req = &arm_requirements_gp_in_r2_not_in_r0_not_in_r3;
2399 
2400  verify_new_node(res);
2401  return optimize_node(res);
2402 }
2403 
2404 ir_node *new_bd_arm_Pkhbt_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2405 {
2406  static arch_register_req_t const *in_reqs[] = {
2407  &arm_class_reg_req_gp,
2408  };
2409 
2410  /* construct in array */
2411  ir_node *const in[] = {
2412  left,
2413  };
2414 
2415  ir_graph *const irg = get_irn_irg(block);
2416  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 1, in);
2417 
2418  /* init node attributes */
2419 
2420  /* flags */
2421  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2422  irn_flags |= arch_irn_flag_rematerializable;
2423  int const n_res = 1;
2424  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2425  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2426  (void)attr; /* avoid potential warning */
2427  init_arm_attributes(res);
2428  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2429  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2430  out_infos[0].req = &arm_class_reg_req_gp;
2431 
2432  verify_new_node(res);
2433  return optimize_node(res);
2434 }
2435 
2436 ir_node *new_bd_arm_Pkhbt_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2437 {
2438  static arch_register_req_t const *in_reqs[] = {
2439  &arm_class_reg_req_gp,
2440  &arm_class_reg_req_gp,
2441  };
2442 
2443  /* construct in array */
2444  ir_node *const in[] = {
2445  left,
2446  right,
2447  };
2448 
2449  ir_graph *const irg = get_irn_irg(block);
2450  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 2, in);
2451 
2452  /* init node attributes */
2453 
2454  /* flags */
2455  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2456  irn_flags |= arch_irn_flag_rematerializable;
2457  int const n_res = 1;
2458  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2459  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2460  (void)attr; /* avoid potential warning */
2461  init_arm_attributes(res);
2462  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2463  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2464  out_infos[0].req = &arm_class_reg_req_gp;
2465 
2466  verify_new_node(res);
2467  return optimize_node(res);
2468 }
2469 
2470 ir_node *new_bd_arm_Pkhbt_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2471 {
2472  static arch_register_req_t const *in_reqs[] = {
2473  &arm_class_reg_req_gp,
2474  &arm_class_reg_req_gp,
2475  };
2476 
2477  /* construct in array */
2478  ir_node *const in[] = {
2479  left,
2480  right,
2481  };
2482 
2483  ir_graph *const irg = get_irn_irg(block);
2484  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 2, in);
2485 
2486  /* init node attributes */
2487 
2488  /* flags */
2489  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2490  irn_flags |= arch_irn_flag_rematerializable;
2491  int const n_res = 1;
2492  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2493  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2494  (void)attr; /* avoid potential warning */
2495  init_arm_attributes(res);
2496  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2497  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2498  out_infos[0].req = &arm_class_reg_req_gp;
2499 
2500  verify_new_node(res);
2501  return optimize_node(res);
2502 }
2503 
2504 ir_node *new_bd_arm_Pkhbt_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2505 {
2506  static arch_register_req_t const *in_reqs[] = {
2507  &arm_class_reg_req_gp,
2508  &arm_class_reg_req_gp,
2509  &arm_class_reg_req_gp,
2510  };
2511 
2512  /* construct in array */
2513  ir_node *const in[] = {
2514  left,
2515  right,
2516  shift,
2517  };
2518 
2519  ir_graph *const irg = get_irn_irg(block);
2520  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 3, in);
2521 
2522  /* init node attributes */
2523 
2524  /* flags */
2525  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2526  irn_flags |= arch_irn_flag_rematerializable;
2527  int const n_res = 1;
2528  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2529  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2530  (void)attr; /* avoid potential warning */
2531  init_arm_attributes(res);
2532  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2533  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2534  out_infos[0].req = &arm_class_reg_req_gp;
2535 
2536  verify_new_node(res);
2537  return optimize_node(res);
2538 }
2539 
2540 ir_node *new_bd_arm_Pkhtb_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2541 {
2542  static arch_register_req_t const *in_reqs[] = {
2543  &arm_class_reg_req_gp,
2544  };
2545 
2546  /* construct in array */
2547  ir_node *const in[] = {
2548  left,
2549  };
2550 
2551  ir_graph *const irg = get_irn_irg(block);
2552  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 1, in);
2553 
2554  /* init node attributes */
2555 
2556  /* flags */
2557  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2558  irn_flags |= arch_irn_flag_rematerializable;
2559  int const n_res = 1;
2560  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2561  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2562  (void)attr; /* avoid potential warning */
2563  init_arm_attributes(res);
2564  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2565  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2566  out_infos[0].req = &arm_class_reg_req_gp;
2567 
2568  verify_new_node(res);
2569  return optimize_node(res);
2570 }
2571 
2572 ir_node *new_bd_arm_Pkhtb_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2573 {
2574  static arch_register_req_t const *in_reqs[] = {
2575  &arm_class_reg_req_gp,
2576  &arm_class_reg_req_gp,
2577  };
2578 
2579  /* construct in array */
2580  ir_node *const in[] = {
2581  left,
2582  right,
2583  };
2584 
2585  ir_graph *const irg = get_irn_irg(block);
2586  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 2, in);
2587 
2588  /* init node attributes */
2589 
2590  /* flags */
2591  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2592  irn_flags |= arch_irn_flag_rematerializable;
2593  int const n_res = 1;
2594  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2595  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2596  (void)attr; /* avoid potential warning */
2597  init_arm_attributes(res);
2598  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2599  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2600  out_infos[0].req = &arm_class_reg_req_gp;
2601 
2602  verify_new_node(res);
2603  return optimize_node(res);
2604 }
2605 
2606 ir_node *new_bd_arm_Pkhtb_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2607 {
2608  static arch_register_req_t const *in_reqs[] = {
2609  &arm_class_reg_req_gp,
2610  &arm_class_reg_req_gp,
2611  };
2612 
2613  /* construct in array */
2614  ir_node *const in[] = {
2615  left,
2616  right,
2617  };
2618 
2619  ir_graph *const irg = get_irn_irg(block);
2620  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 2, in);
2621 
2622  /* init node attributes */
2623 
2624  /* flags */
2625  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2626  irn_flags |= arch_irn_flag_rematerializable;
2627  int const n_res = 1;
2628  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2629  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2630  (void)attr; /* avoid potential warning */
2631  init_arm_attributes(res);
2632  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2633  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2634  out_infos[0].req = &arm_class_reg_req_gp;
2635 
2636  verify_new_node(res);
2637  return optimize_node(res);
2638 }
2639 
2640 ir_node *new_bd_arm_Pkhtb_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2641 {
2642  static arch_register_req_t const *in_reqs[] = {
2643  &arm_class_reg_req_gp,
2644  &arm_class_reg_req_gp,
2645  &arm_class_reg_req_gp,
2646  };
2647 
2648  /* construct in array */
2649  ir_node *const in[] = {
2650  left,
2651  right,
2652  shift,
2653  };
2654 
2655  ir_graph *const irg = get_irn_irg(block);
2656  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 3, in);
2657 
2658  /* init node attributes */
2659 
2660  /* flags */
2661  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2662  irn_flags |= arch_irn_flag_rematerializable;
2663  int const n_res = 1;
2664  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2665  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2666  (void)attr; /* avoid potential warning */
2667  init_arm_attributes(res);
2668  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2669  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2670  out_infos[0].req = &arm_class_reg_req_gp;
2671 
2672  verify_new_node(res);
2673  return optimize_node(res);
2674 }
2675 
2676 ir_node *new_bd_arm_Return(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs)
2677 {
2678 
2679 
2680  ir_graph *const irg = get_irn_irg(block);
2681  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Return, mode_X, arity, in);
2682 
2683  /* init node attributes */
2684 
2685  /* flags */
2686  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2687  int const n_res = 1;
2688  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2689  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
2690  (void)attr; /* avoid potential warning */
2691  init_arm_attributes(res);
2692  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2693  out_infos[0].req = &arch_exec_requirement;
2694 
2695  verify_new_node(res);
2696  return optimize_node(res);
2697 }
2698 
2699 ir_node *new_bd_arm_RsC_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *flags, unsigned char immediate_value, unsigned char immediate_rot)
2700 {
2701  static arch_register_req_t const *in_reqs[] = {
2702  &arm_class_reg_req_gp,
2703  &arm_class_reg_req_flags,
2704  };
2705 
2706  /* construct in array */
2707  ir_node *const in[] = {
2708  left,
2709  flags,
2710  };
2711 
2712  ir_graph *const irg = get_irn_irg(block);
2713  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsC, arm_mode_gp, 2, in);
2714 
2715  /* init node attributes */
2716 
2717  /* flags */
2718  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2719  int const n_res = 1;
2720  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2721  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2722  (void)attr; /* avoid potential warning */
2723  init_arm_attributes(res);
2724  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2725  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2726  out_infos[0].req = &arm_class_reg_req_gp;
2727 
2728  verify_new_node(res);
2729  return optimize_node(res);
2730 }
2731 
2732 ir_node *new_bd_arm_RsC_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags)
2733 {
2734  static arch_register_req_t const *in_reqs[] = {
2735  &arm_class_reg_req_gp,
2736  &arm_class_reg_req_gp,
2737  &arm_class_reg_req_flags,
2738  };
2739 
2740  /* construct in array */
2741  ir_node *const in[] = {
2742  left,
2743  right,
2744  flags,
2745  };
2746 
2747  ir_graph *const irg = get_irn_irg(block);
2748  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsC, arm_mode_gp, 3, in);
2749 
2750  /* init node attributes */
2751 
2752  /* flags */
2753  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2754  int const n_res = 1;
2755  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2756  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2757  (void)attr; /* avoid potential warning */
2758  init_arm_attributes(res);
2759  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2760  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2761  out_infos[0].req = &arm_class_reg_req_gp;
2762 
2763  verify_new_node(res);
2764  return optimize_node(res);
2765 }
2766 
2767 ir_node *new_bd_arm_RsC_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2768 {
2769  static arch_register_req_t const *in_reqs[] = {
2770  &arm_class_reg_req_gp,
2771  &arm_class_reg_req_gp,
2772  &arm_class_reg_req_flags,
2773  };
2774 
2775  /* construct in array */
2776  ir_node *const in[] = {
2777  left,
2778  right,
2779  flags,
2780  };
2781 
2782  ir_graph *const irg = get_irn_irg(block);
2783  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsC, arm_mode_gp, 3, in);
2784 
2785  /* init node attributes */
2786 
2787  /* flags */
2788  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2789  int const n_res = 1;
2790  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2791  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2792  (void)attr; /* avoid potential warning */
2793  init_arm_attributes(res);
2794  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2795  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2796  out_infos[0].req = &arm_class_reg_req_gp;
2797 
2798  verify_new_node(res);
2799  return optimize_node(res);
2800 }
2801 
2802 ir_node *new_bd_arm_RsC_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, ir_node *flags, arm_shift_modifier_t shift_modifier)
2803 {
2804  static arch_register_req_t const *in_reqs[] = {
2805  &arm_class_reg_req_gp,
2806  &arm_class_reg_req_gp,
2807  &arm_class_reg_req_gp,
2808  &arm_class_reg_req_flags,
2809  };
2810 
2811  /* construct in array */
2812  ir_node *const in[] = {
2813  left,
2814  right,
2815  shift,
2816  flags,
2817  };
2818 
2819  ir_graph *const irg = get_irn_irg(block);
2820  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsC, arm_mode_gp, 4, in);
2821 
2822  /* init node attributes */
2823 
2824  /* flags */
2825  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2826  int const n_res = 1;
2827  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2828  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2829  (void)attr; /* avoid potential warning */
2830  init_arm_attributes(res);
2831  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2832  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2833  out_infos[0].req = &arm_class_reg_req_gp;
2834 
2835  verify_new_node(res);
2836  return optimize_node(res);
2837 }
2838 
2839 ir_node *new_bd_arm_Rsb_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2840 {
2841  static arch_register_req_t const *in_reqs[] = {
2842  &arm_class_reg_req_gp,
2843  };
2844 
2845  /* construct in array */
2846  ir_node *const in[] = {
2847  left,
2848  };
2849 
2850  ir_graph *const irg = get_irn_irg(block);
2851  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Rsb, arm_mode_gp, 1, in);
2852 
2853  /* init node attributes */
2854 
2855  /* flags */
2856  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2857  irn_flags |= arch_irn_flag_rematerializable;
2858  int const n_res = 1;
2859  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2860  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2861  (void)attr; /* avoid potential warning */
2862  init_arm_attributes(res);
2863  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2864  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2865  out_infos[0].req = &arm_class_reg_req_gp;
2866 
2867  verify_new_node(res);
2868  return optimize_node(res);
2869 }
2870 
2871 ir_node *new_bd_arm_Rsb_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2872 {
2873  static arch_register_req_t const *in_reqs[] = {
2874  &arm_class_reg_req_gp,
2875  &arm_class_reg_req_gp,
2876  };
2877 
2878  /* construct in array */
2879  ir_node *const in[] = {
2880  left,
2881  right,
2882  };
2883 
2884  ir_graph *const irg = get_irn_irg(block);
2885  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Rsb, arm_mode_gp, 2, in);
2886 
2887  /* init node attributes */
2888 
2889  /* flags */
2890  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2891  irn_flags |= arch_irn_flag_rematerializable;
2892  int const n_res = 1;
2893  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2894  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2895  (void)attr; /* avoid potential warning */
2896  init_arm_attributes(res);
2897  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2898  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2899  out_infos[0].req = &arm_class_reg_req_gp;
2900 
2901  verify_new_node(res);
2902  return optimize_node(res);
2903 }
2904 
2905 ir_node *new_bd_arm_Rsb_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2906 {
2907  static arch_register_req_t const *in_reqs[] = {
2908  &arm_class_reg_req_gp,
2909  &arm_class_reg_req_gp,
2910  };
2911 
2912  /* construct in array */
2913  ir_node *const in[] = {
2914  left,
2915  right,
2916  };
2917 
2918  ir_graph *const irg = get_irn_irg(block);
2919  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Rsb, arm_mode_gp, 2, in);
2920 
2921  /* init node attributes */
2922 
2923  /* flags */
2924  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2925  irn_flags |= arch_irn_flag_rematerializable;
2926  int const n_res = 1;
2927  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2928  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2929  (void)attr; /* avoid potential warning */
2930  init_arm_attributes(res);
2931  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2932  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2933  out_infos[0].req = &arm_class_reg_req_gp;
2934 
2935  verify_new_node(res);
2936  return optimize_node(res);
2937 }
2938 
2939 ir_node *new_bd_arm_Rsb_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2940 {
2941  static arch_register_req_t const *in_reqs[] = {
2942  &arm_class_reg_req_gp,
2943  &arm_class_reg_req_gp,
2944  &arm_class_reg_req_gp,
2945  };
2946 
2947  /* construct in array */
2948  ir_node *const in[] = {
2949  left,
2950  right,
2951  shift,
2952  };
2953 
2954  ir_graph *const irg = get_irn_irg(block);
2955  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Rsb, arm_mode_gp, 3, in);
2956 
2957  /* init node attributes */
2958 
2959  /* flags */
2960  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2961  irn_flags |= arch_irn_flag_rematerializable;
2962  int const n_res = 1;
2963  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2964  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2965  (void)attr; /* avoid potential warning */
2966  init_arm_attributes(res);
2967  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2968  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2969  out_infos[0].req = &arm_class_reg_req_gp;
2970 
2971  verify_new_node(res);
2972  return optimize_node(res);
2973 }
2974 
2975 ir_node *new_bd_arm_RsbS_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2976 {
2977  static arch_register_req_t const *in_reqs[] = {
2978  &arm_class_reg_req_gp,
2979  };
2980 
2981  /* construct in array */
2982  ir_node *const in[] = {
2983  left,
2984  };
2985 
2986  ir_graph *const irg = get_irn_irg(block);
2987  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsbS, mode_T, 1, in);
2988 
2989  /* init node attributes */
2990 
2991  /* flags */
2992  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2993  irn_flags |= arch_irn_flag_modify_flags;
2994  irn_flags |= arch_irn_flag_rematerializable;
2995  int const n_res = 2;
2996  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2997  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2998  (void)attr; /* avoid potential warning */
2999  init_arm_attributes(res);
3000  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3001  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3002  out_infos[0].req = &arm_class_reg_req_gp;
3003  out_infos[1].req = &arm_class_reg_req_flags;
3004 
3005  verify_new_node(res);
3006  return optimize_node(res);
3007 }
3008 
3009 ir_node *new_bd_arm_RsbS_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3010 {
3011  static arch_register_req_t const *in_reqs[] = {
3012  &arm_class_reg_req_gp,
3013  &arm_class_reg_req_gp,
3014  };
3015 
3016  /* construct in array */
3017  ir_node *const in[] = {
3018  left,
3019  right,
3020  };
3021 
3022  ir_graph *const irg = get_irn_irg(block);
3023  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsbS, mode_T, 2, in);
3024 
3025  /* init node attributes */
3026 
3027  /* flags */
3028  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3029  irn_flags |= arch_irn_flag_modify_flags;
3030  irn_flags |= arch_irn_flag_rematerializable;
3031  int const n_res = 2;
3032  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3033  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3034  (void)attr; /* avoid potential warning */
3035  init_arm_attributes(res);
3036  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3037  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3038  out_infos[0].req = &arm_class_reg_req_gp;
3039  out_infos[1].req = &arm_class_reg_req_flags;
3040 
3041  verify_new_node(res);
3042  return optimize_node(res);
3043 }
3044 
3045 ir_node *new_bd_arm_RsbS_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
3046 {
3047  static arch_register_req_t const *in_reqs[] = {
3048  &arm_class_reg_req_gp,
3049  &arm_class_reg_req_gp,
3050  };
3051 
3052  /* construct in array */
3053  ir_node *const in[] = {
3054  left,
3055  right,
3056  };
3057 
3058  ir_graph *const irg = get_irn_irg(block);
3059  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsbS, mode_T, 2, in);
3060 
3061  /* init node attributes */
3062 
3063  /* flags */
3064  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3065  irn_flags |= arch_irn_flag_modify_flags;
3066  irn_flags |= arch_irn_flag_rematerializable;
3067  int const n_res = 2;
3068  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3069  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3070  (void)attr; /* avoid potential warning */
3071  init_arm_attributes(res);
3072  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3073  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3074  out_infos[0].req = &arm_class_reg_req_gp;
3075  out_infos[1].req = &arm_class_reg_req_flags;
3076 
3077  verify_new_node(res);
3078  return optimize_node(res);
3079 }
3080 
3081 ir_node *new_bd_arm_RsbS_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
3082 {
3083  static arch_register_req_t const *in_reqs[] = {
3084  &arm_class_reg_req_gp,
3085  &arm_class_reg_req_gp,
3086  &arm_class_reg_req_gp,
3087  };
3088 
3089  /* construct in array */
3090  ir_node *const in[] = {
3091  left,
3092  right,
3093  shift,
3094  };
3095 
3096  ir_graph *const irg = get_irn_irg(block);
3097  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsbS, mode_T, 3, in);
3098 
3099  /* init node attributes */
3100 
3101  /* flags */
3102  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3103  irn_flags |= arch_irn_flag_modify_flags;
3104  irn_flags |= arch_irn_flag_rematerializable;
3105  int const n_res = 2;
3106  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3107  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3108  (void)attr; /* avoid potential warning */
3109  init_arm_attributes(res);
3110  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3111  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3112  out_infos[0].req = &arm_class_reg_req_gp;
3113  out_infos[1].req = &arm_class_reg_req_flags;
3114 
3115  verify_new_node(res);
3116  return optimize_node(res);
3117 }
3118 
3119 ir_node *new_bd_arm_SMulL(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
3120 {
3121  static arch_register_req_t const *in_reqs[] = {
3122  &arm_class_reg_req_gp,
3123  &arm_class_reg_req_gp,
3124  };
3125 
3126  /* construct in array */
3127  ir_node *const in[] = {
3128  op0,
3129  op1,
3130  };
3131 
3132  ir_graph *const irg = get_irn_irg(block);
3133  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SMulL, mode_T, 2, in);
3134 
3135  /* init node attributes */
3136 
3137  /* flags */
3138  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3139  irn_flags |= arch_irn_flag_rematerializable;
3140  int const n_res = 2;
3141  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3142  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
3143  (void)attr; /* avoid potential warning */
3144  init_arm_attributes(res);
3145  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3146  out_infos[0].req = &arm_class_reg_req_gp;
3147  out_infos[1].req = &arm_class_reg_req_gp;
3148 
3149  verify_new_node(res);
3150  return optimize_node(res);
3151 }
3152 
3153 ir_node *new_bd_arm_SMulL_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3154 {
3155 
3156  /* construct in array */
3157  ir_node *const in[] = {
3158  left,
3159  right,
3160  };
3161 
3162  ir_graph *const irg = get_irn_irg(block);
3163  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SMulL_t, mode_T, 2, in);
3164 
3165  /* init node attributes */
3166 
3167  verify_new_node(res);
3168  return optimize_node(res);
3169 }
3170 
3171 ir_node *new_bd_arm_SbC_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *flags, unsigned char immediate_value, unsigned char immediate_rot)
3172 {
3173  static arch_register_req_t const *in_reqs[] = {
3174  &arm_class_reg_req_gp,
3175  &arm_class_reg_req_flags,
3176  };
3177 
3178  /* construct in array */
3179  ir_node *const in[] = {
3180  left,
3181  flags,
3182  };
3183 
3184  ir_graph *const irg = get_irn_irg(block);
3185  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC, arm_mode_gp, 2, in);
3186 
3187  /* init node attributes */
3188 
3189  /* flags */
3190  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3191  int const n_res = 1;
3192  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3193  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3194  (void)attr; /* avoid potential warning */
3195  init_arm_attributes(res);
3196  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3197  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3198  out_infos[0].req = &arm_class_reg_req_gp;
3199 
3200  verify_new_node(res);
3201  return optimize_node(res);
3202 }
3203 
3204 ir_node *new_bd_arm_SbC_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags)
3205 {
3206  static arch_register_req_t const *in_reqs[] = {
3207  &arm_class_reg_req_gp,
3208  &arm_class_reg_req_gp,
3209  &arm_class_reg_req_flags,
3210  };
3211 
3212  /* construct in array */
3213  ir_node *const in[] = {
3214  left,
3215  right,
3216  flags,
3217  };
3218 
3219  ir_graph *const irg = get_irn_irg(block);
3220  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC, arm_mode_gp, 3, in);
3221 
3222  /* init node attributes */
3223 
3224  /* flags */
3225  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3226  int const n_res = 1;
3227  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3228  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3229  (void)attr; /* avoid potential warning */
3230  init_arm_attributes(res);
3231  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3232  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3233  out_infos[0].req = &arm_class_reg_req_gp;
3234 
3235  verify_new_node(res);
3236  return optimize_node(res);
3237 }
3238 
3239 ir_node *new_bd_arm_SbC_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
3240 {
3241  static arch_register_req_t const *in_reqs[] = {
3242  &arm_class_reg_req_gp,
3243  &arm_class_reg_req_gp,
3244  &arm_class_reg_req_flags,
3245  };
3246 
3247  /* construct in array */
3248  ir_node *const in[] = {
3249  left,
3250  right,
3251  flags,
3252  };
3253 
3254  ir_graph *const irg = get_irn_irg(block);
3255  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC, arm_mode_gp, 3, in);
3256 
3257  /* init node attributes */
3258 
3259  /* flags */
3260  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3261  int const n_res = 1;
3262  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3263  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3264  (void)attr; /* avoid potential warning */
3265  init_arm_attributes(res);
3266  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3267  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3268  out_infos[0].req = &arm_class_reg_req_gp;
3269 
3270  verify_new_node(res);
3271  return optimize_node(res);
3272 }
3273 
3274 ir_node *new_bd_arm_SbC_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, ir_node *flags, arm_shift_modifier_t shift_modifier)
3275 {
3276  static arch_register_req_t const *in_reqs[] = {
3277  &arm_class_reg_req_gp,
3278  &arm_class_reg_req_gp,
3279  &arm_class_reg_req_gp,
3280  &arm_class_reg_req_flags,
3281  };
3282 
3283  /* construct in array */
3284  ir_node *const in[] = {
3285  left,
3286  right,
3287  shift,
3288  flags,
3289  };
3290 
3291  ir_graph *const irg = get_irn_irg(block);
3292  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC, arm_mode_gp, 4, in);
3293 
3294  /* init node attributes */
3295 
3296  /* flags */
3297  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3298  int const n_res = 1;
3299  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3300  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3301  (void)attr; /* avoid potential warning */
3302  init_arm_attributes(res);
3303  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3304  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3305  out_infos[0].req = &arm_class_reg_req_gp;
3306 
3307  verify_new_node(res);
3308  return optimize_node(res);
3309 }
3310 
3311 ir_node *new_bd_arm_SbC_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, ir_mode *mode)
3312 {
3313 
3314  /* construct in array */
3315  ir_node *const in[] = {
3316  left,
3317  right,
3318  flags,
3319  };
3320 
3321  ir_graph *const irg = get_irn_irg(block);
3322  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC_t, mode, 3, in);
3323 
3324  /* init node attributes */
3325 
3326  verify_new_node(res);
3327  return optimize_node(res);
3328 }
3329 
3330 ir_node *new_bd_arm_Stf(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *val, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
3331 {
3332  static arch_register_req_t const *in_reqs[] = {
3333  &arm_class_reg_req_gp,
3334  &arm_class_reg_req_fpa,
3335  &arch_memory_requirement,
3336  };
3337 
3338  /* construct in array */
3339  ir_node *const in[] = {
3340  ptr,
3341  val,
3342  mem,
3343  };
3344 
3345  ir_graph *const irg = get_irn_irg(block);
3346  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Stf, mode_M, 3, in);
3347 
3348  /* init node attributes */
3349 
3350  /* flags */
3351  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3352  int const n_res = 1;
3353  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3354  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
3355  (void)attr; /* avoid potential warning */
3356  init_arm_attributes(res);
3357  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
3358  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3359  out_infos[0].req = &arch_memory_requirement;
3360 
3361  verify_new_node(res);
3362  return optimize_node(res);
3363 }
3364 
3365 ir_node *new_bd_arm_Str(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *val, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
3366 {
3367  static arch_register_req_t const *in_reqs[] = {
3368  &arm_class_reg_req_gp,
3369  &arm_class_reg_req_gp,
3370  &arch_memory_requirement,
3371  };
3372 
3373  /* construct in array */
3374  ir_node *const in[] = {
3375  ptr,
3376  val,
3377  mem,
3378  };
3379 
3380  ir_graph *const irg = get_irn_irg(block);
3381  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Str, mode_M, 3, in);
3382 
3383  /* init node attributes */
3384 
3385  /* flags */
3386  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3387  int const n_res = 1;
3388  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3389  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
3390  (void)attr; /* avoid potential warning */
3391  init_arm_attributes(res);
3392  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
3393  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3394  out_infos[0].req = &arch_memory_requirement;
3395 
3396  verify_new_node(res);
3397  return optimize_node(res);
3398 }
3399 
3400 ir_node *new_bd_arm_Sub_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
3401 {
3402  static arch_register_req_t const *in_reqs[] = {
3403  &arm_class_reg_req_gp,
3404  };
3405 
3406  /* construct in array */
3407  ir_node *const in[] = {
3408  left,
3409  };
3410 
3411  ir_graph *const irg = get_irn_irg(block);
3412  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Sub, arm_mode_gp, 1, in);
3413 
3414  /* init node attributes */
3415 
3416  /* flags */
3417  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3418  irn_flags |= arch_irn_flag_rematerializable;
3419  int const n_res = 1;
3420  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3421  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3422  (void)attr; /* avoid potential warning */
3423  init_arm_attributes(res);
3424  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3425  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3426  out_infos[0].req = &arm_class_reg_req_gp;
3427 
3428  verify_new_node(res);
3429  return optimize_node(res);
3430 }
3431 
3432 ir_node *new_bd_arm_Sub_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3433 {
3434  static arch_register_req_t const *in_reqs[] = {
3435  &arm_class_reg_req_gp,
3436  &arm_class_reg_req_gp,
3437  };
3438 
3439  /* construct in array */
3440  ir_node *const in[] = {
3441  left,
3442  right,
3443  };
3444 
3445  ir_graph *const irg = get_irn_irg(block);
3446  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Sub, arm_mode_gp, 2, in);
3447 
3448  /* init node attributes */
3449 
3450  /* flags */
3451  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3452  irn_flags |= arch_irn_flag_rematerializable;
3453  int const n_res = 1;
3454  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3455  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3456  (void)attr; /* avoid potential warning */
3457  init_arm_attributes(res);
3458  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3459  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3460  out_infos[0].req = &arm_class_reg_req_gp;
3461 
3462  verify_new_node(res);
3463  return optimize_node(res);
3464 }
3465 
3466 ir_node *new_bd_arm_Sub_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
3467 {
3468  static arch_register_req_t const *in_reqs[] = {
3469  &arm_class_reg_req_gp,
3470  &arm_class_reg_req_gp,
3471  };
3472 
3473  /* construct in array */
3474  ir_node *const in[] = {
3475  left,
3476  right,
3477  };
3478 
3479  ir_graph *const irg = get_irn_irg(block);
3480  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Sub, arm_mode_gp, 2, in);
3481 
3482  /* init node attributes */
3483 
3484  /* flags */
3485  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3486  irn_flags |= arch_irn_flag_rematerializable;
3487  int const n_res = 1;
3488  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3489  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3490  (void)attr; /* avoid potential warning */
3491  init_arm_attributes(res);
3492  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3493  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3494  out_infos[0].req = &arm_class_reg_req_gp;
3495 
3496  verify_new_node(res);
3497  return optimize_node(res);
3498 }
3499 
3500 ir_node *new_bd_arm_Sub_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
3501 {
3502  static arch_register_req_t const *in_reqs[] = {
3503  &arm_class_reg_req_gp,
3504  &arm_class_reg_req_gp,
3505  &arm_class_reg_req_gp,
3506  };
3507 
3508  /* construct in array */
3509  ir_node *const in[] = {
3510  left,
3511  right,
3512  shift,
3513  };
3514 
3515  ir_graph *const irg = get_irn_irg(block);
3516  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Sub, arm_mode_gp, 3, in);
3517 
3518  /* init node attributes */
3519 
3520  /* flags */
3521  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3522  irn_flags |= arch_irn_flag_rematerializable;
3523  int const n_res = 1;
3524  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3525  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3526  (void)attr; /* avoid potential warning */
3527  init_arm_attributes(res);
3528  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3529  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3530  out_infos[0].req = &arm_class_reg_req_gp;
3531 
3532  verify_new_node(res);
3533  return optimize_node(res);
3534 }
3535 
3536 ir_node *new_bd_arm_SubS_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
3537 {
3538  static arch_register_req_t const *in_reqs[] = {
3539  &arm_class_reg_req_gp,
3540  };
3541 
3542  /* construct in array */
3543  ir_node *const in[] = {
3544  left,
3545  };
3546 
3547  ir_graph *const irg = get_irn_irg(block);
3548  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS, mode_T, 1, in);
3549 
3550  /* init node attributes */
3551 
3552  /* flags */
3553  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3554  irn_flags |= arch_irn_flag_modify_flags;
3555  irn_flags |= arch_irn_flag_rematerializable;
3556  int const n_res = 2;
3557  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3558  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3559  (void)attr; /* avoid potential warning */
3560  init_arm_attributes(res);
3561  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3562  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3563  out_infos[0].req = &arm_class_reg_req_gp;
3564  out_infos[1].req = &arm_class_reg_req_flags;
3565 
3566  verify_new_node(res);
3567  return optimize_node(res);
3568 }
3569 
3570 ir_node *new_bd_arm_SubS_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3571 {
3572  static arch_register_req_t const *in_reqs[] = {
3573  &arm_class_reg_req_gp,
3574  &arm_class_reg_req_gp,
3575  };
3576 
3577  /* construct in array */
3578  ir_node *const in[] = {
3579  left,
3580  right,
3581  };
3582 
3583  ir_graph *const irg = get_irn_irg(block);
3584  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS, mode_T, 2, in);
3585 
3586  /* init node attributes */
3587 
3588  /* flags */
3589  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3590  irn_flags |= arch_irn_flag_modify_flags;
3591  irn_flags |= arch_irn_flag_rematerializable;
3592  int const n_res = 2;
3593  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3594  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3595  (void)attr; /* avoid potential warning */
3596  init_arm_attributes(res);
3597  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3598  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3599  out_infos[0].req = &arm_class_reg_req_gp;
3600  out_infos[1].req = &arm_class_reg_req_flags;
3601 
3602  verify_new_node(res);
3603  return optimize_node(res);
3604 }
3605 
3606 ir_node *new_bd_arm_SubS_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
3607 {
3608  static arch_register_req_t const *in_reqs[] = {
3609  &arm_class_reg_req_gp,
3610  &arm_class_reg_req_gp,
3611  };
3612 
3613  /* construct in array */
3614  ir_node *const in[] = {
3615  left,
3616  right,
3617  };
3618 
3619  ir_graph *const irg = get_irn_irg(block);
3620  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS, mode_T, 2, in);
3621 
3622  /* init node attributes */
3623 
3624  /* flags */
3625  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3626  irn_flags |= arch_irn_flag_modify_flags;
3627  irn_flags |= arch_irn_flag_rematerializable;
3628  int const n_res = 2;
3629  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3630  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3631  (void)attr; /* avoid potential warning */
3632  init_arm_attributes(res);
3633  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3634  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3635  out_infos[0].req = &arm_class_reg_req_gp;
3636  out_infos[1].req = &arm_class_reg_req_flags;
3637 
3638  verify_new_node(res);
3639  return optimize_node(res);
3640 }
3641 
3642 ir_node *new_bd_arm_SubS_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
3643 {
3644  static arch_register_req_t const *in_reqs[] = {
3645  &arm_class_reg_req_gp,
3646  &arm_class_reg_req_gp,
3647  &arm_class_reg_req_gp,
3648  };
3649 
3650  /* construct in array */
3651  ir_node *const in[] = {
3652  left,
3653  right,
3654  shift,
3655  };
3656 
3657  ir_graph *const irg = get_irn_irg(block);
3658  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS, mode_T, 3, in);
3659 
3660  /* init node attributes */
3661 
3662  /* flags */
3663  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3664  irn_flags |= arch_irn_flag_modify_flags;
3665  irn_flags |= arch_irn_flag_rematerializable;
3666  int const n_res = 2;
3667  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3668  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3669  (void)attr; /* avoid potential warning */
3670  init_arm_attributes(res);
3671  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3672  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3673  out_infos[0].req = &arm_class_reg_req_gp;
3674  out_infos[1].req = &arm_class_reg_req_flags;
3675 
3676  verify_new_node(res);
3677  return optimize_node(res);
3678 }
3679 
3680 ir_node *new_bd_arm_SubS_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3681 {
3682 
3683  /* construct in array */
3684  ir_node *const in[] = {
3685  left,
3686  right,
3687  };
3688 
3689  ir_graph *const irg = get_irn_irg(block);
3690  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS_t, mode_T, 2, in);
3691 
3692  /* init node attributes */
3693 
3694  verify_new_node(res);
3695  return optimize_node(res);
3696 }
3697 
3698 ir_node *new_bd_arm_Suf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode)
3699 {
3700  static arch_register_req_t const *in_reqs[] = {
3701  &arm_class_reg_req_fpa,
3702  &arm_class_reg_req_fpa,
3703  };
3704 
3705  /* construct in array */
3706  ir_node *const in[] = {
3707  op0,
3708  op1,
3709  };
3710 
3711  ir_graph *const irg = get_irn_irg(block);
3712  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Suf, mode_F, 2, in);
3713 
3714  /* init node attributes */
3715 
3716  /* flags */
3717  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3718  irn_flags |= arch_irn_flag_rematerializable;
3719  int const n_res = 1;
3720  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3721  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
3722  (void)attr; /* avoid potential warning */
3723  init_arm_attributes(res);
3724  init_arm_farith_attributes(res, op_mode);
3725  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3726  out_infos[0].req = &arm_class_reg_req_fpa;
3727 
3728  verify_new_node(res);
3729  return optimize_node(res);
3730 }
3731 
3732 ir_node *new_bd_arm_SwitchJmp(dbg_info *dbgi, ir_node *block, ir_node *op0, int n_res, const ir_switch_table *table)
3733 {
3734  static arch_register_req_t const *in_reqs[] = {
3735  &arm_class_reg_req_gp,
3736  };
3737 
3738  /* construct in array */
3739  ir_node *const in[] = {
3740  op0,
3741  };
3742 
3743  ir_graph *const irg = get_irn_irg(block);
3744  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SwitchJmp, mode_T, 1, in);
3745 
3746  /* init node attributes */
3747 
3748  /* flags */
3749  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3750  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3751  arm_SwitchJmp_attr_t *const attr = (arm_SwitchJmp_attr_t*)get_irn_generic_attr(res);
3752  (void)attr; /* avoid potential warning */
3753  init_arm_attributes(res);
3754  be_switch_attr_init(res, &attr->swtch, table, NULL);
3755 
3756  verify_new_node(res);
3757  return optimize_node(res);
3758 }
3759 
3760 ir_node *new_bd_arm_Tst_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot, bool ins_permuted, bool is_unsigned)
3761 {
3762  static arch_register_req_t const *in_reqs[] = {
3763  &arm_class_reg_req_gp,
3764  };
3765 
3766  /* construct in array */
3767  ir_node *const in[] = {
3768  left,
3769  };
3770 
3771  ir_graph *const irg = get_irn_irg(block);
3772  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 1, in);
3773 
3774  /* init node attributes */
3775 
3776  /* flags */
3777  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3778  irn_flags |= arch_irn_flag_rematerializable;
3779  irn_flags |= arch_irn_flag_modify_flags;
3780  int const n_res = 1;
3781  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3782  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
3783  (void)attr; /* avoid potential warning */
3784  init_arm_attributes(res);
3785  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3786  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3787 
3788  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3789  out_infos[0].req = &arm_class_reg_req_flags;
3790 
3791  verify_new_node(res);
3792  return optimize_node(res);
3793 }
3794 
3795 ir_node *new_bd_arm_Tst_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, bool ins_permuted, bool is_unsigned)
3796 {
3797  static arch_register_req_t const *in_reqs[] = {
3798  &arm_class_reg_req_gp,
3799  &arm_class_reg_req_gp,
3800  };
3801 
3802  /* construct in array */
3803  ir_node *const in[] = {
3804  left,
3805  right,
3806  };
3807 
3808  ir_graph *const irg = get_irn_irg(block);
3809  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 2, in);
3810 
3811  /* init node attributes */
3812 
3813  /* flags */
3814  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3815  irn_flags |= arch_irn_flag_rematerializable;
3816  irn_flags |= arch_irn_flag_modify_flags;
3817  int const n_res = 1;
3818  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3819  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
3820  (void)attr; /* avoid potential warning */
3821  init_arm_attributes(res);
3822  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3823  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3824 
3825  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3826  out_infos[0].req = &arm_class_reg_req_flags;
3827 
3828  verify_new_node(res);
3829  return optimize_node(res);
3830 }
3831 
3832 ir_node *new_bd_arm_Tst_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned)
3833 {
3834  static arch_register_req_t const *in_reqs[] = {
3835  &arm_class_reg_req_gp,
3836  &arm_class_reg_req_gp,
3837  };
3838 
3839  /* construct in array */
3840  ir_node *const in[] = {
3841  left,
3842  right,
3843  };
3844 
3845  ir_graph *const irg = get_irn_irg(block);
3846  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 2, in);
3847 
3848  /* init node attributes */
3849 
3850  /* flags */
3851  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3852  irn_flags |= arch_irn_flag_rematerializable;
3853  irn_flags |= arch_irn_flag_modify_flags;
3854  int const n_res = 1;
3855  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3856  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
3857  (void)attr; /* avoid potential warning */
3858  init_arm_attributes(res);
3859  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3860  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3861 
3862  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3863  out_infos[0].req = &arm_class_reg_req_flags;
3864 
3865  verify_new_node(res);
3866  return optimize_node(res);
3867 }
3868 
3869 ir_node *new_bd_arm_Tst_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned)
3870 {
3871  static arch_register_req_t const *in_reqs[] = {
3872  &arm_class_reg_req_gp,
3873  &arm_class_reg_req_gp,
3874  &arm_class_reg_req_gp,
3875  };
3876 
3877  /* construct in array */
3878  ir_node *const in[] = {
3879  left,
3880  right,
3881  shift,
3882  };
3883 
3884  ir_graph *const irg = get_irn_irg(block);
3885  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 3, in);
3886 
3887  /* init node attributes */
3888 
3889  /* flags */
3890  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3891  irn_flags |= arch_irn_flag_rematerializable;
3892  irn_flags |= arch_irn_flag_modify_flags;
3893  int const n_res = 1;
3894  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3895  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
3896  (void)attr; /* avoid potential warning */
3897  init_arm_attributes(res);
3898  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3899  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3900 
3901  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3902  out_infos[0].req = &arm_class_reg_req_flags;
3903 
3904  verify_new_node(res);
3905  return optimize_node(res);
3906 }
3907 
3908 ir_node *new_bd_arm_UMulL(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
3909 {
3910  static arch_register_req_t const *in_reqs[] = {
3911  &arm_class_reg_req_gp,
3912  &arm_class_reg_req_gp,
3913  };
3914 
3915  /* construct in array */
3916  ir_node *const in[] = {
3917  op0,
3918  op1,
3919  };
3920 
3921  ir_graph *const irg = get_irn_irg(block);
3922  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_UMulL, mode_T, 2, in);
3923 
3924  /* init node attributes */
3925 
3926  /* flags */
3927  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3928  irn_flags |= arch_irn_flag_rematerializable;
3929  int const n_res = 2;
3930  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3931  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
3932  (void)attr; /* avoid potential warning */
3933  init_arm_attributes(res);
3934  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3935  out_infos[0].req = &arm_class_reg_req_gp;
3936  out_infos[1].req = &arm_class_reg_req_gp;
3937 
3938  verify_new_node(res);
3939  return optimize_node(res);
3940 }
3941 
3942 ir_node *new_bd_arm_UMulL_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3943 {
3944 
3945  /* construct in array */
3946  ir_node *const in[] = {
3947  left,
3948  right,
3949  };
3950 
3951  ir_graph *const irg = get_irn_irg(block);
3952  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_UMulL_t, mode_T, 2, in);
3953 
3954  /* init node attributes */
3955 
3956  verify_new_node(res);
3957  return optimize_node(res);
3958 }
3959 
3960 ir_node *new_bd_arm_fConst(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
3961 {
3962  arch_register_req_t const **const in_reqs = NULL;
3963 
3964 
3965  ir_graph *const irg = get_irn_irg(block);
3966  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_fConst, mode_F, 0, NULL);
3967 
3968  /* init node attributes */
3969 
3970  /* flags */
3971  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3972  irn_flags |= arch_irn_flag_rematerializable;
3973  int const n_res = 1;
3974  be_info_init_irn(res, irn_flags, in_reqs, n_res);
3975  arm_fConst_attr_t *const attr = (arm_fConst_attr_t*)get_irn_generic_attr(res);
3976  (void)attr; /* avoid potential warning */
3977  init_arm_attributes(res);
3978  attr->tv = tv;
3979  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3980  out_infos[0].req = &arm_class_reg_req_fpa;
3981 
3982  verify_new_node(res);
3983  return optimize_node(res);
3984 }
3985 
3986 
3991 void arm_create_opcodes(void)
3992 {
3993  ir_op *op;
3994  int cur_opcode = get_next_ir_opcodes(iro_arm_last);
3995 
3996  arm_opcode_start = cur_opcode;
3997  op = new_ir_op(cur_opcode + iro_arm_AdC, "arm_AdC", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
3998  set_op_dump(op, arm_dump_node);
3999  set_op_attrs_equal(op, arm_shifter_operands_equal);
4000  set_op_copy_attr(op, be_copy_attr);
4001  set_op_tag(op, arm_op_tag);
4002  op_arm_AdC = op;
4003  op = new_ir_op(cur_opcode + iro_arm_AdC_t, "arm_AdC_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4004  set_op_dump(op, NULL);
4005  set_op_tag(op, arm_op_tag);
4006  op_arm_AdC_t = op;
4007  op = new_ir_op(cur_opcode + iro_arm_Add, "arm_Add", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4008  set_op_dump(op, arm_dump_node);
4009  set_op_attrs_equal(op, arm_shifter_operands_equal);
4010  set_op_copy_attr(op, be_copy_attr);
4011  set_op_tag(op, arm_op_tag);
4012  op_arm_Add = op;
4013  op = new_ir_op(cur_opcode + iro_arm_AddS, "arm_AddS", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4014  set_op_dump(op, arm_dump_node);
4015  set_op_attrs_equal(op, arm_shifter_operands_equal);
4016  set_op_copy_attr(op, be_copy_attr);
4017  set_op_tag(op, arm_op_tag);
4018  op_arm_AddS = op;
4019  op = new_ir_op(cur_opcode + iro_arm_AddS_t, "arm_AddS_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4020  set_op_dump(op, NULL);
4021  set_op_tag(op, arm_op_tag);
4022  op_arm_AddS_t = op;
4023  op = new_ir_op(cur_opcode + iro_arm_Address, "arm_Address", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(arm_Address_attr_t));
4024  set_op_dump(op, arm_dump_node);
4025  set_op_attrs_equal(op, arm_Address_attrs_equal);
4026  set_op_copy_attr(op, be_copy_attr);
4027  set_op_tag(op, arm_op_tag);
4028  op_arm_Address = op;
4029  op = new_ir_op(cur_opcode + iro_arm_Adf, "arm_Adf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4030  set_op_dump(op, arm_dump_node);
4031  set_op_attrs_equal(op, arm_farith_attrs_equal);
4032  set_op_copy_attr(op, be_copy_attr);
4033  set_op_tag(op, arm_op_tag);
4034  op_arm_Adf = op;
4035  op = new_ir_op(cur_opcode + iro_arm_And, "arm_And", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4036  set_op_dump(op, arm_dump_node);
4037  set_op_attrs_equal(op, arm_shifter_operands_equal);
4038  set_op_copy_attr(op, be_copy_attr);
4039  set_op_tag(op, arm_op_tag);
4040  op_arm_And = op;
4041  op = new_ir_op(cur_opcode + iro_arm_B, "arm_B", op_pin_state_pinned, irop_flag_cfopcode, oparity_any, -1, sizeof(arm_attr_t));
4042  set_op_dump(op, arm_dump_node);
4043  set_op_attrs_equal(op, arm_attrs_equal);
4044  set_op_copy_attr(op, be_copy_attr);
4045  set_op_tag(op, arm_op_tag);
4046  op_arm_B = op;
4047  op = new_ir_op(cur_opcode + iro_arm_Bcc, "arm_Bcc", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(arm_CondJmp_attr_t));
4048  set_op_dump(op, arm_dump_node);
4049  set_op_attrs_equal(op, arm_CondJmp_attrs_equal);
4050  set_op_copy_attr(op, be_copy_attr);
4051  set_op_tag(op, arm_op_tag);
4052  op_arm_Bcc = op;
4053  op = new_ir_op(cur_opcode + iro_arm_Bic, "arm_Bic", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4054  set_op_dump(op, arm_dump_node);
4055  set_op_attrs_equal(op, arm_shifter_operands_equal);
4056  set_op_copy_attr(op, be_copy_attr);
4057  set_op_tag(op, arm_op_tag);
4058  op_arm_Bic = op;
4059  op = new_ir_op(cur_opcode + iro_arm_Bl, "arm_Bl", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(arm_Address_attr_t));
4060  set_op_dump(op, arm_dump_node);
4061  set_op_attrs_equal(op, arm_Address_attrs_equal);
4062  set_op_copy_attr(op, be_copy_attr);
4063  set_op_tag(op, arm_op_tag);
4064  op_arm_Bl = op;
4065  op = new_ir_op(cur_opcode + iro_arm_Clz, "arm_Clz", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4066  set_op_dump(op, arm_dump_node);
4067  set_op_attrs_equal(op, arm_attrs_equal);
4068  set_op_copy_attr(op, be_copy_attr);
4069  set_op_tag(op, arm_op_tag);
4070  op_arm_Clz = op;
4071  op = new_ir_op(cur_opcode + iro_arm_Cmfe, "arm_Cmfe", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_cmp_attr_t));
4072  set_op_dump(op, arm_dump_node);
4073  set_op_attrs_equal(op, arm_cmp_attrs_equal);
4074  set_op_copy_attr(op, be_copy_attr);
4075  set_op_tag(op, arm_op_tag);
4076  op_arm_Cmfe = op;
4077  op = new_ir_op(cur_opcode + iro_arm_Cmn, "arm_Cmn", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_cmp_attr_t));
4078  set_op_dump(op, arm_dump_node);
4079  set_op_attrs_equal(op, arm_cmp_attrs_equal);
4080  set_op_copy_attr(op, be_copy_attr);
4081  set_op_tag(op, arm_op_tag);
4082  op_arm_Cmn = op;
4083  op = new_ir_op(cur_opcode + iro_arm_Cmp, "arm_Cmp", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_cmp_attr_t));
4084  set_op_dump(op, arm_dump_node);
4085  set_op_attrs_equal(op, arm_cmp_attrs_equal);
4086  set_op_copy_attr(op, be_copy_attr);
4087  set_op_tag(op, arm_op_tag);
4088  op_arm_Cmp = op;
4089  op = new_ir_op(cur_opcode + iro_arm_Dvf, "arm_Dvf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4090  set_op_dump(op, arm_dump_node);
4091  set_op_attrs_equal(op, arm_farith_attrs_equal);
4092  set_op_copy_attr(op, be_copy_attr);
4093  set_op_tag(op, arm_op_tag);
4094  op_arm_Dvf = op;
4095  op = new_ir_op(cur_opcode + iro_arm_Eor, "arm_Eor", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4096  set_op_dump(op, arm_dump_node);
4097  set_op_attrs_equal(op, arm_shifter_operands_equal);
4098  set_op_copy_attr(op, be_copy_attr);
4099  set_op_tag(op, arm_op_tag);
4100  op_arm_Eor = op;
4101  op = new_ir_op(cur_opcode + iro_arm_Flt, "arm_Flt", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4102  set_op_dump(op, arm_dump_node);
4103  set_op_attrs_equal(op, arm_farith_attrs_equal);
4104  set_op_copy_attr(op, be_copy_attr);
4105  set_op_tag(op, arm_op_tag);
4106  op_arm_Flt = op;
4107  op = new_ir_op(cur_opcode + iro_arm_FrameAddr, "arm_FrameAddr", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(arm_Address_attr_t));
4108  set_op_dump(op, arm_dump_node);
4109  set_op_attrs_equal(op, arm_Address_attrs_equal);
4110  set_op_copy_attr(op, be_copy_attr);
4111  set_op_tag(op, arm_op_tag);
4112  op_arm_FrameAddr = op;
4113  op = new_ir_op(cur_opcode + iro_arm_IJmp, "arm_IJmp", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(arm_attr_t));
4114  set_op_dump(op, arm_dump_node);
4115  set_op_attrs_equal(op, arm_attrs_equal);
4116  set_op_copy_attr(op, be_copy_attr);
4117  set_op_tag(op, arm_op_tag);
4118  op_arm_IJmp = op;
4119  op = new_ir_op(cur_opcode + iro_arm_Ldf, "arm_Ldf", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(arm_load_store_attr_t));
4120  ir_op_set_memory_index(op, 1); set_op_dump(op, arm_dump_node);
4121  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4122  set_op_copy_attr(op, be_copy_attr);
4123  set_op_tag(op, arm_op_tag);
4124  op_arm_Ldf = op;
4125  op = new_ir_op(cur_opcode + iro_arm_Ldr, "arm_Ldr", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(arm_load_store_attr_t));
4126  ir_op_set_memory_index(op, 1); set_op_dump(op, arm_dump_node);
4127  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4128  set_op_copy_attr(op, be_copy_attr);
4129  set_op_tag(op, arm_op_tag);
4130  op_arm_Ldr = op;
4131  op = new_ir_op(cur_opcode + iro_arm_LinkLdrPC, "arm_LinkLdrPC", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(arm_load_store_attr_t));
4132  set_op_dump(op, arm_dump_node);
4133  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4134  set_op_copy_attr(op, be_copy_attr);
4135  set_op_tag(op, arm_op_tag);
4136  op_arm_LinkLdrPC = op;
4137  op = new_ir_op(cur_opcode + iro_arm_LinkMovPC, "arm_LinkMovPC", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4138  set_op_dump(op, arm_dump_node);
4139  set_op_attrs_equal(op, arm_shifter_operands_equal);
4140  set_op_copy_attr(op, be_copy_attr);
4141  set_op_tag(op, arm_op_tag);
4142  op_arm_LinkMovPC = op;
4143  op = new_ir_op(cur_opcode + iro_arm_Mla, "arm_Mla", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4144  set_op_dump(op, arm_dump_node);
4145  set_op_attrs_equal(op, arm_attrs_equal);
4146  set_op_copy_attr(op, be_copy_attr);
4147  set_op_tag(op, arm_op_tag);
4148  op_arm_Mla = op;
4149  op = new_ir_op(cur_opcode + iro_arm_Mls, "arm_Mls", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4150  set_op_dump(op, arm_dump_node);
4151  set_op_attrs_equal(op, arm_attrs_equal);
4152  set_op_copy_attr(op, be_copy_attr);
4153  set_op_tag(op, arm_op_tag);
4154  op_arm_Mls = op;
4155  op = new_ir_op(cur_opcode + iro_arm_Mov, "arm_Mov", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4156  set_op_dump(op, arm_dump_node);
4157  set_op_attrs_equal(op, arm_shifter_operands_equal);
4158  set_op_copy_attr(op, be_copy_attr);
4159  set_op_tag(op, arm_op_tag);
4160  op_arm_Mov = op;
4161  op = new_ir_op(cur_opcode + iro_arm_Muf, "arm_Muf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4162  set_op_dump(op, arm_dump_node);
4163  set_op_attrs_equal(op, arm_farith_attrs_equal);
4164  set_op_copy_attr(op, be_copy_attr);
4165  set_op_tag(op, arm_op_tag);
4166  op_arm_Muf = op;
4167  op = new_ir_op(cur_opcode + iro_arm_Mul, "arm_Mul", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4168  set_op_dump(op, arm_dump_node);
4169  set_op_attrs_equal(op, arm_attrs_equal);
4170  set_op_copy_attr(op, be_copy_attr);
4171  set_op_tag(op, arm_op_tag);
4172  op_arm_Mul = op;
4173  op = new_ir_op(cur_opcode + iro_arm_Mvf, "arm_Mvf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4174  set_op_dump(op, arm_dump_node);
4175  set_op_attrs_equal(op, arm_farith_attrs_equal);
4176  set_op_copy_attr(op, be_copy_attr);
4177  set_op_tag(op, arm_op_tag);
4178  op_arm_Mvf = op;
4179  op = new_ir_op(cur_opcode + iro_arm_Mvn, "arm_Mvn", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4180  set_op_dump(op, arm_dump_node);
4181  set_op_attrs_equal(op, arm_shifter_operands_equal);
4182  set_op_copy_attr(op, be_copy_attr);
4183  set_op_tag(op, arm_op_tag);
4184  op_arm_Mvn = op;
4185  op = new_ir_op(cur_opcode + iro_arm_OrPl_t, "arm_OrPl_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4186  set_op_dump(op, NULL);
4187  set_op_tag(op, arm_op_tag);
4188  op_arm_OrPl_t = op;
4189  op = new_ir_op(cur_opcode + iro_arm_Orr, "arm_Orr", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4190  set_op_dump(op, arm_dump_node);
4191  set_op_attrs_equal(op, arm_shifter_operands_equal);
4192  set_op_copy_attr(op, be_copy_attr);
4193  set_op_tag(op, arm_op_tag);
4194  op_arm_Orr = op;
4195  op = new_ir_op(cur_opcode + iro_arm_OrrPl, "arm_OrrPl", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4196  set_op_dump(op, arm_dump_node);
4197  set_op_attrs_equal(op, arm_shifter_operands_equal);
4198  set_op_copy_attr(op, be_copy_attr);
4199  set_op_tag(op, arm_op_tag);
4200  op_arm_OrrPl = op;
4201  op = new_ir_op(cur_opcode + iro_arm_Pkhbt, "arm_Pkhbt", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4202  set_op_dump(op, arm_dump_node);
4203  set_op_attrs_equal(op, arm_shifter_operands_equal);
4204  set_op_copy_attr(op, be_copy_attr);
4205  set_op_tag(op, arm_op_tag);
4206  op_arm_Pkhbt = op;
4207  op = new_ir_op(cur_opcode + iro_arm_Pkhtb, "arm_Pkhtb", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4208  set_op_dump(op, arm_dump_node);
4209  set_op_attrs_equal(op, arm_shifter_operands_equal);
4210  set_op_copy_attr(op, be_copy_attr);
4211  set_op_tag(op, arm_op_tag);
4212  op_arm_Pkhtb = op;
4213  op = new_ir_op(cur_opcode + iro_arm_Return, "arm_Return", op_pin_state_pinned, irop_flag_cfopcode, oparity_any, -1, sizeof(arm_attr_t));
4214  set_op_dump(op, arm_dump_node);
4215  set_op_attrs_equal(op, arm_attrs_equal);
4216  set_op_copy_attr(op, be_copy_attr);
4217  set_op_tag(op, arm_op_tag);
4218  op_arm_Return = op;
4219  op = new_ir_op(cur_opcode + iro_arm_RsC, "arm_RsC", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4220  set_op_dump(op, arm_dump_node);
4221  set_op_attrs_equal(op, arm_shifter_operands_equal);
4222  set_op_copy_attr(op, be_copy_attr);
4223  set_op_tag(op, arm_op_tag);
4224  op_arm_RsC = op;
4225  op = new_ir_op(cur_opcode + iro_arm_Rsb, "arm_Rsb", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4226  set_op_dump(op, arm_dump_node);
4227  set_op_attrs_equal(op, arm_shifter_operands_equal);
4228  set_op_copy_attr(op, be_copy_attr);
4229  set_op_tag(op, arm_op_tag);
4230  op_arm_Rsb = op;
4231  op = new_ir_op(cur_opcode + iro_arm_RsbS, "arm_RsbS", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4232  set_op_dump(op, arm_dump_node);
4233  set_op_attrs_equal(op, arm_shifter_operands_equal);
4234  set_op_copy_attr(op, be_copy_attr);
4235  set_op_tag(op, arm_op_tag);
4236  op_arm_RsbS = op;
4237  op = new_ir_op(cur_opcode + iro_arm_SMulL, "arm_SMulL", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4238  set_op_dump(op, arm_dump_node);
4239  set_op_attrs_equal(op, arm_attrs_equal);
4240  set_op_copy_attr(op, be_copy_attr);
4241  set_op_tag(op, arm_op_tag);
4242  op_arm_SMulL = op;
4243  op = new_ir_op(cur_opcode + iro_arm_SMulL_t, "arm_SMulL_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4244  set_op_dump(op, NULL);
4245  set_op_tag(op, arm_op_tag);
4246  op_arm_SMulL_t = op;
4247  op = new_ir_op(cur_opcode + iro_arm_SbC, "arm_SbC", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4248  set_op_dump(op, arm_dump_node);
4249  set_op_attrs_equal(op, arm_shifter_operands_equal);
4250  set_op_copy_attr(op, be_copy_attr);
4251  set_op_tag(op, arm_op_tag);
4252  op_arm_SbC = op;
4253  op = new_ir_op(cur_opcode + iro_arm_SbC_t, "arm_SbC_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4254  set_op_dump(op, NULL);
4255  set_op_tag(op, arm_op_tag);
4256  op_arm_SbC_t = op;
4257  op = new_ir_op(cur_opcode + iro_arm_Stf, "arm_Stf", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(arm_load_store_attr_t));
4258  ir_op_set_memory_index(op, 2); set_op_dump(op, arm_dump_node);
4259  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4260  set_op_copy_attr(op, be_copy_attr);
4261  set_op_tag(op, arm_op_tag);
4262  op_arm_Stf = op;
4263  op = new_ir_op(cur_opcode + iro_arm_Str, "arm_Str", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(arm_load_store_attr_t));
4264  ir_op_set_memory_index(op, 2); set_op_dump(op, arm_dump_node);
4265  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4266  set_op_copy_attr(op, be_copy_attr);
4267  set_op_tag(op, arm_op_tag);
4268  op_arm_Str = op;
4269  op = new_ir_op(cur_opcode + iro_arm_Sub, "arm_Sub", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4270  set_op_dump(op, arm_dump_node);
4271  set_op_attrs_equal(op, arm_shifter_operands_equal);
4272  set_op_copy_attr(op, be_copy_attr);
4273  set_op_tag(op, arm_op_tag);
4274  op_arm_Sub = op;
4275  op = new_ir_op(cur_opcode + iro_arm_SubS, "arm_SubS", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4276  set_op_dump(op, arm_dump_node);
4277  set_op_attrs_equal(op, arm_shifter_operands_equal);
4278  set_op_copy_attr(op, be_copy_attr);
4279  set_op_tag(op, arm_op_tag);
4280  op_arm_SubS = op;
4281  op = new_ir_op(cur_opcode + iro_arm_SubS_t, "arm_SubS_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4282  set_op_dump(op, NULL);
4283  set_op_tag(op, arm_op_tag);
4284  op_arm_SubS_t = op;
4285  op = new_ir_op(cur_opcode + iro_arm_Suf, "arm_Suf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4286  set_op_dump(op, arm_dump_node);
4287  set_op_attrs_equal(op, arm_farith_attrs_equal);
4288  set_op_copy_attr(op, be_copy_attr);
4289  set_op_tag(op, arm_op_tag);
4290  op_arm_Suf = op;
4291  op = new_ir_op(cur_opcode + iro_arm_SwitchJmp, "arm_SwitchJmp", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(arm_SwitchJmp_attr_t));
4292  set_op_dump(op, arm_dump_node);
4293  set_op_attrs_equal(op, arm_SwitchJmp_attrs_equal);
4294  set_op_copy_attr(op, be_copy_attr);
4295  set_op_tag(op, arm_op_tag);
4296  op_arm_SwitchJmp = op;
4297  op = new_ir_op(cur_opcode + iro_arm_Tst, "arm_Tst", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_cmp_attr_t));
4298  set_op_dump(op, arm_dump_node);
4299  set_op_attrs_equal(op, arm_cmp_attrs_equal);
4300  set_op_copy_attr(op, be_copy_attr);
4301  set_op_tag(op, arm_op_tag);
4302  op_arm_Tst = op;
4303  op = new_ir_op(cur_opcode + iro_arm_UMulL, "arm_UMulL", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4304  set_op_dump(op, arm_dump_node);
4305  set_op_attrs_equal(op, arm_attrs_equal);
4306  set_op_copy_attr(op, be_copy_attr);
4307  set_op_tag(op, arm_op_tag);
4308  op_arm_UMulL = op;
4309  op = new_ir_op(cur_opcode + iro_arm_UMulL_t, "arm_UMulL_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4310  set_op_dump(op, NULL);
4311  set_op_tag(op, arm_op_tag);
4312  op_arm_UMulL_t = op;
4313  op = new_ir_op(cur_opcode + iro_arm_fConst, "arm_fConst", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(arm_fConst_attr_t));
4314  set_op_dump(op, arm_dump_node);
4315  set_op_attrs_equal(op, arm_fConst_attrs_equal);
4316  set_op_copy_attr(op, be_copy_attr);
4317  set_op_tag(op, arm_op_tag);
4318  op_arm_fConst = op;
4319 
4320 }
4321 
4322 void arm_free_opcodes(void)
4323 {
4324  free_ir_op(op_arm_AdC); op_arm_AdC = NULL;
4325  free_ir_op(op_arm_AdC_t); op_arm_AdC_t = NULL;
4326  free_ir_op(op_arm_Add); op_arm_Add = NULL;
4327  free_ir_op(op_arm_AddS); op_arm_AddS = NULL;
4328  free_ir_op(op_arm_AddS_t); op_arm_AddS_t = NULL;
4329  free_ir_op(op_arm_Address); op_arm_Address = NULL;
4330  free_ir_op(op_arm_Adf); op_arm_Adf = NULL;
4331  free_ir_op(op_arm_And); op_arm_And = NULL;
4332  free_ir_op(op_arm_B); op_arm_B = NULL;
4333  free_ir_op(op_arm_Bcc); op_arm_Bcc = NULL;
4334  free_ir_op(op_arm_Bic); op_arm_Bic = NULL;
4335  free_ir_op(op_arm_Bl); op_arm_Bl = NULL;
4336  free_ir_op(op_arm_Clz); op_arm_Clz = NULL;
4337  free_ir_op(op_arm_Cmfe); op_arm_Cmfe = NULL;
4338  free_ir_op(op_arm_Cmn); op_arm_Cmn = NULL;
4339  free_ir_op(op_arm_Cmp); op_arm_Cmp = NULL;
4340  free_ir_op(op_arm_Dvf); op_arm_Dvf = NULL;
4341  free_ir_op(op_arm_Eor); op_arm_Eor = NULL;
4342  free_ir_op(op_arm_Flt); op_arm_Flt = NULL;
4343  free_ir_op(op_arm_FrameAddr); op_arm_FrameAddr = NULL;
4344  free_ir_op(op_arm_IJmp); op_arm_IJmp = NULL;
4345  free_ir_op(op_arm_Ldf); op_arm_Ldf = NULL;
4346  free_ir_op(op_arm_Ldr); op_arm_Ldr = NULL;
4347  free_ir_op(op_arm_LinkLdrPC); op_arm_LinkLdrPC = NULL;
4348  free_ir_op(op_arm_LinkMovPC); op_arm_LinkMovPC = NULL;
4349  free_ir_op(op_arm_Mla); op_arm_Mla = NULL;
4350  free_ir_op(op_arm_Mls); op_arm_Mls = NULL;
4351  free_ir_op(op_arm_Mov); op_arm_Mov = NULL;
4352  free_ir_op(op_arm_Muf); op_arm_Muf = NULL;
4353  free_ir_op(op_arm_Mul); op_arm_Mul = NULL;
4354  free_ir_op(op_arm_Mvf); op_arm_Mvf = NULL;
4355  free_ir_op(op_arm_Mvn); op_arm_Mvn = NULL;
4356  free_ir_op(op_arm_OrPl_t); op_arm_OrPl_t = NULL;
4357  free_ir_op(op_arm_Orr); op_arm_Orr = NULL;
4358  free_ir_op(op_arm_OrrPl); op_arm_OrrPl = NULL;
4359  free_ir_op(op_arm_Pkhbt); op_arm_Pkhbt = NULL;
4360  free_ir_op(op_arm_Pkhtb); op_arm_Pkhtb = NULL;
4361  free_ir_op(op_arm_Return); op_arm_Return = NULL;
4362  free_ir_op(op_arm_RsC); op_arm_RsC = NULL;
4363  free_ir_op(op_arm_Rsb); op_arm_Rsb = NULL;
4364  free_ir_op(op_arm_RsbS); op_arm_RsbS = NULL;
4365  free_ir_op(op_arm_SMulL); op_arm_SMulL = NULL;
4366  free_ir_op(op_arm_SMulL_t); op_arm_SMulL_t = NULL;
4367  free_ir_op(op_arm_SbC); op_arm_SbC = NULL;
4368  free_ir_op(op_arm_SbC_t); op_arm_SbC_t = NULL;
4369  free_ir_op(op_arm_Stf); op_arm_Stf = NULL;
4370  free_ir_op(op_arm_Str); op_arm_Str = NULL;
4371  free_ir_op(op_arm_Sub); op_arm_Sub = NULL;
4372  free_ir_op(op_arm_SubS); op_arm_SubS = NULL;
4373  free_ir_op(op_arm_SubS_t); op_arm_SubS_t = NULL;
4374  free_ir_op(op_arm_Suf); op_arm_Suf = NULL;
4375  free_ir_op(op_arm_SwitchJmp); op_arm_SwitchJmp = NULL;
4376  free_ir_op(op_arm_Tst); op_arm_Tst = NULL;
4377  free_ir_op(op_arm_UMulL); op_arm_UMulL = NULL;
4378  free_ir_op(op_arm_UMulL_t); op_arm_UMulL_t = NULL;
4379  free_ir_op(op_arm_fConst); op_arm_fConst = NULL;
4380 
4381 }
void set_op_dump(ir_op *op, dump_node_func func)
Sets dump callback func for operation op.
void * get_irn_generic_attr(ir_node *node)
Returns a pointer to the node attributes.
ir_mode * mode_X
execution
Definition: irmode.h:205
unsigned get_next_ir_opcodes(unsigned num)
Returns the next free n IR opcode number, allows to register a bunch of user ops. ...
void set_op_attrs_equal(ir_op *op, node_attrs_equal_func func)
Sets attrs_equal callback func for operation op.
ir_op * new_ir_op(unsigned code, const char *name, op_pin_state p, irop_flags flags, op_arity opar, int op_index, size_t attr_size)
Creates a new IR operation.
Nodes of this opcode can be placed in any basic block.
Definition: firm_types.h:202
struct ir_graph ir_graph
Procedure Graph.
Definition: firm_types.h:74
struct dbg_info dbg_info
Source Reference.
Definition: firm_types.h:40
struct ir_node ir_node
Procedure Graph Node.
Definition: firm_types.h:53
ir_mode * mode_F
ieee754 binary32 float (single precision)
Definition: irmode.h:180
Forking control flow at this operation.
Definition: irop.h:48
struct ir_mode ir_mode
SSA Value mode.
Definition: firm_types.h:59
ir_node * new_ir_node(dbg_info *db, ir_graph *irg, ir_node *block, ir_op *op, ir_mode *mode, int arity, ir_node *const *in)
IR node constructor.
This operation is a control flow operation.
Definition: irop.h:44
unsigned get_irn_opcode(const ir_node *node)
Returns the opcode-enum of the node.
struct ir_switch_table ir_switch_table
A switch table mapping integer numbers to proj-numbers of a Switch-node.
Definition: firm_types.h:105
struct ir_entity ir_entity
Entity.
Definition: firm_types.h:83
ir_graph * get_irn_irg(const ir_node *node)
Returns the ir_graph this node belongs to.
ir_mode * mode_M
memory
Definition: irmode.h:178
Node must remain in this basic block if it can throw an exception, else can float.
Definition: firm_types.h:204
ir_op * get_irn_op(const ir_node *node)
Returns the opcode struct of the node.
void ir_op_set_memory_index(ir_op *op, int memory_index)
Sets memory input of operation using memory.
struct ir_op ir_op
Node Opcode.
Definition: firm_types.h:56
ir_node * optimize_node(ir_node *n)
Applies local optimizations to a single node.
void free_ir_op(ir_op *code)
Frees an ir operation.
Nodes must remain in this basic block.
Definition: firm_types.h:203
ir_mode * mode_T
tuple (none)
Definition: irmode.h:208
Nothing.
Definition: irop.h:42
This operation has no arguments and is some kind of a constant.
Definition: irop.h:49
struct ir_tarval ir_tarval
Target Machine Value.
Definition: firm_types.h:68
void verify_new_node(ir_node *node)
If firm is built in debug mode, verify that a newly created node is fine.
void set_op_copy_attr(ir_op *op, copy_attr_func func)
Sets attribute copy callback func for operation op.
ir_relation
Relations for comparing numbers.
Definition: firm_types.h:162
This operation has a memory input and may change the memory state.
Definition: irop.h:53
Any other arity, either fixed for the opcode or known when creating the node.
Definition: irop.h:36