11 #include "gen_mips_regalloc_if.h"
13 #include "mips_bearch_t.h"
15 const arch_register_req_t mips_class_reg_req_gp = {
16 .cls = &mips_reg_classes[CLASS_mips_gp],
19 static const unsigned mips_limited_gp_zero[] = { (1U << REG_GP_ZERO) };
20 const arch_register_req_t mips_single_reg_req_gp_zero = {
21 .cls = &mips_reg_classes[CLASS_mips_gp],
22 .limited = mips_limited_gp_zero,
25 static const unsigned mips_limited_gp_at[] = { (1U << REG_GP_AT) };
26 const arch_register_req_t mips_single_reg_req_gp_at = {
27 .cls = &mips_reg_classes[CLASS_mips_gp],
28 .limited = mips_limited_gp_at,
31 static const unsigned mips_limited_gp_v0[] = { (1U << REG_GP_V0) };
32 const arch_register_req_t mips_single_reg_req_gp_v0 = {
33 .cls = &mips_reg_classes[CLASS_mips_gp],
34 .limited = mips_limited_gp_v0,
37 static const unsigned mips_limited_gp_v1[] = { (1U << REG_GP_V1) };
38 const arch_register_req_t mips_single_reg_req_gp_v1 = {
39 .cls = &mips_reg_classes[CLASS_mips_gp],
40 .limited = mips_limited_gp_v1,
43 static const unsigned mips_limited_gp_a0[] = { (1U << REG_GP_A0) };
44 const arch_register_req_t mips_single_reg_req_gp_a0 = {
45 .cls = &mips_reg_classes[CLASS_mips_gp],
46 .limited = mips_limited_gp_a0,
49 static const unsigned mips_limited_gp_a1[] = { (1U << REG_GP_A1) };
50 const arch_register_req_t mips_single_reg_req_gp_a1 = {
51 .cls = &mips_reg_classes[CLASS_mips_gp],
52 .limited = mips_limited_gp_a1,
55 static const unsigned mips_limited_gp_a2[] = { (1U << REG_GP_A2) };
56 const arch_register_req_t mips_single_reg_req_gp_a2 = {
57 .cls = &mips_reg_classes[CLASS_mips_gp],
58 .limited = mips_limited_gp_a2,
61 static const unsigned mips_limited_gp_a3[] = { (1U << REG_GP_A3) };
62 const arch_register_req_t mips_single_reg_req_gp_a3 = {
63 .cls = &mips_reg_classes[CLASS_mips_gp],
64 .limited = mips_limited_gp_a3,
67 static const unsigned mips_limited_gp_t0[] = { (1U << REG_GP_T0) };
68 const arch_register_req_t mips_single_reg_req_gp_t0 = {
69 .cls = &mips_reg_classes[CLASS_mips_gp],
70 .limited = mips_limited_gp_t0,
73 static const unsigned mips_limited_gp_t1[] = { (1U << REG_GP_T1) };
74 const arch_register_req_t mips_single_reg_req_gp_t1 = {
75 .cls = &mips_reg_classes[CLASS_mips_gp],
76 .limited = mips_limited_gp_t1,
79 static const unsigned mips_limited_gp_t2[] = { (1U << REG_GP_T2) };
80 const arch_register_req_t mips_single_reg_req_gp_t2 = {
81 .cls = &mips_reg_classes[CLASS_mips_gp],
82 .limited = mips_limited_gp_t2,
85 static const unsigned mips_limited_gp_t3[] = { (1U << REG_GP_T3) };
86 const arch_register_req_t mips_single_reg_req_gp_t3 = {
87 .cls = &mips_reg_classes[CLASS_mips_gp],
88 .limited = mips_limited_gp_t3,
91 static const unsigned mips_limited_gp_t4[] = { (1U << REG_GP_T4) };
92 const arch_register_req_t mips_single_reg_req_gp_t4 = {
93 .cls = &mips_reg_classes[CLASS_mips_gp],
94 .limited = mips_limited_gp_t4,
97 static const unsigned mips_limited_gp_t5[] = { (1U << REG_GP_T5) };
98 const arch_register_req_t mips_single_reg_req_gp_t5 = {
99 .cls = &mips_reg_classes[CLASS_mips_gp],
100 .limited = mips_limited_gp_t5,
103 static const unsigned mips_limited_gp_t6[] = { (1U << REG_GP_T6) };
104 const arch_register_req_t mips_single_reg_req_gp_t6 = {
105 .cls = &mips_reg_classes[CLASS_mips_gp],
106 .limited = mips_limited_gp_t6,
109 static const unsigned mips_limited_gp_t7[] = { (1U << REG_GP_T7) };
110 const arch_register_req_t mips_single_reg_req_gp_t7 = {
111 .cls = &mips_reg_classes[CLASS_mips_gp],
112 .limited = mips_limited_gp_t7,
115 static const unsigned mips_limited_gp_s0[] = { (1U << REG_GP_S0) };
116 const arch_register_req_t mips_single_reg_req_gp_s0 = {
117 .cls = &mips_reg_classes[CLASS_mips_gp],
118 .limited = mips_limited_gp_s0,
121 static const unsigned mips_limited_gp_s1[] = { (1U << REG_GP_S1) };
122 const arch_register_req_t mips_single_reg_req_gp_s1 = {
123 .cls = &mips_reg_classes[CLASS_mips_gp],
124 .limited = mips_limited_gp_s1,
127 static const unsigned mips_limited_gp_s2[] = { (1U << REG_GP_S2) };
128 const arch_register_req_t mips_single_reg_req_gp_s2 = {
129 .cls = &mips_reg_classes[CLASS_mips_gp],
130 .limited = mips_limited_gp_s2,
133 static const unsigned mips_limited_gp_s3[] = { (1U << REG_GP_S3) };
134 const arch_register_req_t mips_single_reg_req_gp_s3 = {
135 .cls = &mips_reg_classes[CLASS_mips_gp],
136 .limited = mips_limited_gp_s3,
139 static const unsigned mips_limited_gp_s4[] = { (1U << REG_GP_S4) };
140 const arch_register_req_t mips_single_reg_req_gp_s4 = {
141 .cls = &mips_reg_classes[CLASS_mips_gp],
142 .limited = mips_limited_gp_s4,
145 static const unsigned mips_limited_gp_s5[] = { (1U << REG_GP_S5) };
146 const arch_register_req_t mips_single_reg_req_gp_s5 = {
147 .cls = &mips_reg_classes[CLASS_mips_gp],
148 .limited = mips_limited_gp_s5,
151 static const unsigned mips_limited_gp_s6[] = { (1U << REG_GP_S6) };
152 const arch_register_req_t mips_single_reg_req_gp_s6 = {
153 .cls = &mips_reg_classes[CLASS_mips_gp],
154 .limited = mips_limited_gp_s6,
157 static const unsigned mips_limited_gp_s7[] = { (1U << REG_GP_S7) };
158 const arch_register_req_t mips_single_reg_req_gp_s7 = {
159 .cls = &mips_reg_classes[CLASS_mips_gp],
160 .limited = mips_limited_gp_s7,
163 static const unsigned mips_limited_gp_t8[] = { (1U << REG_GP_T8) };
164 const arch_register_req_t mips_single_reg_req_gp_t8 = {
165 .cls = &mips_reg_classes[CLASS_mips_gp],
166 .limited = mips_limited_gp_t8,
169 static const unsigned mips_limited_gp_t9[] = { (1U << REG_GP_T9) };
170 const arch_register_req_t mips_single_reg_req_gp_t9 = {
171 .cls = &mips_reg_classes[CLASS_mips_gp],
172 .limited = mips_limited_gp_t9,
175 static const unsigned mips_limited_gp_k0[] = { (1U << REG_GP_K0) };
176 const arch_register_req_t mips_single_reg_req_gp_k0 = {
177 .cls = &mips_reg_classes[CLASS_mips_gp],
178 .limited = mips_limited_gp_k0,
181 static const unsigned mips_limited_gp_k1[] = { (1U << REG_GP_K1) };
182 const arch_register_req_t mips_single_reg_req_gp_k1 = {
183 .cls = &mips_reg_classes[CLASS_mips_gp],
184 .limited = mips_limited_gp_k1,
187 static const unsigned mips_limited_gp_gp[] = { (1U << REG_GP_GP) };
188 const arch_register_req_t mips_single_reg_req_gp_gp = {
189 .cls = &mips_reg_classes[CLASS_mips_gp],
190 .limited = mips_limited_gp_gp,
193 static const unsigned mips_limited_gp_sp[] = { (1U << REG_GP_SP) };
194 const arch_register_req_t mips_single_reg_req_gp_sp = {
195 .cls = &mips_reg_classes[CLASS_mips_gp],
196 .limited = mips_limited_gp_sp,
199 static const unsigned mips_limited_gp_s8[] = { (1U << REG_GP_S8) };
200 const arch_register_req_t mips_single_reg_req_gp_s8 = {
201 .cls = &mips_reg_classes[CLASS_mips_gp],
202 .limited = mips_limited_gp_s8,
205 static const unsigned mips_limited_gp_ra[] = { (1U << REG_GP_RA) };
206 const arch_register_req_t mips_single_reg_req_gp_ra = {
207 .cls = &mips_reg_classes[CLASS_mips_gp],
208 .limited = mips_limited_gp_ra,
213 arch_register_class_t mips_reg_classes[] = {
217 .regs = &mips_registers[REG_ZERO],
218 .class_req = &mips_class_reg_req_gp,
219 .index = CLASS_mips_gp,
226 const arch_register_t mips_registers[] = {
229 .cls = &mips_reg_classes[CLASS_mips_gp],
230 .single_req = &mips_single_reg_req_gp_zero,
231 .index = REG_GP_ZERO,
232 .global_index = REG_ZERO,
239 .cls = &mips_reg_classes[CLASS_mips_gp],
240 .single_req = &mips_single_reg_req_gp_at,
242 .global_index = REG_AT,
249 .cls = &mips_reg_classes[CLASS_mips_gp],
250 .single_req = &mips_single_reg_req_gp_v0,
252 .global_index = REG_V0,
259 .cls = &mips_reg_classes[CLASS_mips_gp],
260 .single_req = &mips_single_reg_req_gp_v1,
262 .global_index = REG_V1,
269 .cls = &mips_reg_classes[CLASS_mips_gp],
270 .single_req = &mips_single_reg_req_gp_a0,
272 .global_index = REG_A0,
279 .cls = &mips_reg_classes[CLASS_mips_gp],
280 .single_req = &mips_single_reg_req_gp_a1,
282 .global_index = REG_A1,
289 .cls = &mips_reg_classes[CLASS_mips_gp],
290 .single_req = &mips_single_reg_req_gp_a2,
292 .global_index = REG_A2,
299 .cls = &mips_reg_classes[CLASS_mips_gp],
300 .single_req = &mips_single_reg_req_gp_a3,
302 .global_index = REG_A3,
309 .cls = &mips_reg_classes[CLASS_mips_gp],
310 .single_req = &mips_single_reg_req_gp_t0,
312 .global_index = REG_T0,
319 .cls = &mips_reg_classes[CLASS_mips_gp],
320 .single_req = &mips_single_reg_req_gp_t1,
322 .global_index = REG_T1,
329 .cls = &mips_reg_classes[CLASS_mips_gp],
330 .single_req = &mips_single_reg_req_gp_t2,
332 .global_index = REG_T2,
339 .cls = &mips_reg_classes[CLASS_mips_gp],
340 .single_req = &mips_single_reg_req_gp_t3,
342 .global_index = REG_T3,
349 .cls = &mips_reg_classes[CLASS_mips_gp],
350 .single_req = &mips_single_reg_req_gp_t4,
352 .global_index = REG_T4,
359 .cls = &mips_reg_classes[CLASS_mips_gp],
360 .single_req = &mips_single_reg_req_gp_t5,
362 .global_index = REG_T5,
369 .cls = &mips_reg_classes[CLASS_mips_gp],
370 .single_req = &mips_single_reg_req_gp_t6,
372 .global_index = REG_T6,
379 .cls = &mips_reg_classes[CLASS_mips_gp],
380 .single_req = &mips_single_reg_req_gp_t7,
382 .global_index = REG_T7,
389 .cls = &mips_reg_classes[CLASS_mips_gp],
390 .single_req = &mips_single_reg_req_gp_s0,
392 .global_index = REG_S0,
399 .cls = &mips_reg_classes[CLASS_mips_gp],
400 .single_req = &mips_single_reg_req_gp_s1,
402 .global_index = REG_S1,
409 .cls = &mips_reg_classes[CLASS_mips_gp],
410 .single_req = &mips_single_reg_req_gp_s2,
412 .global_index = REG_S2,
419 .cls = &mips_reg_classes[CLASS_mips_gp],
420 .single_req = &mips_single_reg_req_gp_s3,
422 .global_index = REG_S3,
429 .cls = &mips_reg_classes[CLASS_mips_gp],
430 .single_req = &mips_single_reg_req_gp_s4,
432 .global_index = REG_S4,
439 .cls = &mips_reg_classes[CLASS_mips_gp],
440 .single_req = &mips_single_reg_req_gp_s5,
442 .global_index = REG_S5,
449 .cls = &mips_reg_classes[CLASS_mips_gp],
450 .single_req = &mips_single_reg_req_gp_s6,
452 .global_index = REG_S6,
459 .cls = &mips_reg_classes[CLASS_mips_gp],
460 .single_req = &mips_single_reg_req_gp_s7,
462 .global_index = REG_S7,
469 .cls = &mips_reg_classes[CLASS_mips_gp],
470 .single_req = &mips_single_reg_req_gp_t8,
472 .global_index = REG_T8,
479 .cls = &mips_reg_classes[CLASS_mips_gp],
480 .single_req = &mips_single_reg_req_gp_t9,
482 .global_index = REG_T9,
489 .cls = &mips_reg_classes[CLASS_mips_gp],
490 .single_req = &mips_single_reg_req_gp_k0,
492 .global_index = REG_K0,
499 .cls = &mips_reg_classes[CLASS_mips_gp],
500 .single_req = &mips_single_reg_req_gp_k1,
502 .global_index = REG_K1,
509 .cls = &mips_reg_classes[CLASS_mips_gp],
510 .single_req = &mips_single_reg_req_gp_gp,
512 .global_index = REG_GP,
519 .cls = &mips_reg_classes[CLASS_mips_gp],
520 .single_req = &mips_single_reg_req_gp_sp,
522 .global_index = REG_SP,
529 .cls = &mips_reg_classes[CLASS_mips_gp],
530 .single_req = &mips_single_reg_req_gp_s8,
532 .global_index = REG_S8,
539 .cls = &mips_reg_classes[CLASS_mips_gp],
540 .single_req = &mips_single_reg_req_gp_ra,
542 .global_index = REG_RA,
553 void mips_register_init(
void)
555 mips_reg_classes[CLASS_mips_gp].mode =
mode_Iu;